IP Library Granted Patent US 9,030,003
Granted Patent B2
US 9,030,003 · App. 13/697,886 · Granted May 12, 2015

Encapsulated semiconductor device and method for manufacturing the same

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Quick Facts
Patent No.
US 9,030,003
App. No.
13/697,886
Granted
May 12, 2015
Kind
B2
Abstract

An encapsulated semiconductor device includes: a first conduction path formative plate ( 1 ); a second conduction path formative plate ( 5 ) joined to the first conduction path formative plate; a power element ( 12 ) bonded to the first conduction path formative plate; a heatsink ( 14 ) held by the first conduction path formative plate with an insulation sheet ( 13 ) interposed between the heatsink and the first conduction path formative plate; and an encapsulation resin ( 9 ) configured to encapsulate the first and second conduction path formative plates. A through hole ( 3 ) or a lead gap ( 1 b ) is formed in a region of the first conduction path formative plate in contact with the insulation sheet. The insulation sheet is press-fitted into the through hole or the lead gap.

Claims (34)

1. An encapsulated semiconductor device comprising:

a first conduction path formative plate;

a second conduction path formative plate joined to the first conduction path formative plate;

a semiconductor element bonded to the first conduction path formative plate;

a heatsink held by the first conduction path formative plate with an insulation sheet interposed between the heatsink and the first conduction path formative plate; and

an encapsulation resin configured to encapsulate the first and second conduction path formative plates, wherein

a through hole or a lead gap is formed in a region of the first conduction path formative plate in contact with the insulation sheet, and

insulation performance is increased by press-fitting a part of the insulation sheet into the through hole or the lead gap and filling the through hole or the lead gap with the part of the insulation sheet such that a void does not remain between the encapsulation resin and the insulation sheet and the part of the insulation sheet extends along an inner surface of the through hole or the lead gap.

2. The encapsulated semiconductor device of claim 1 , wherein the insulation sheet which is press-fitted into the through hole or the lead gap is in contact with an inner surface of the through hole or the lead gap.

3. The encapsulated semiconductor device of claim 1 , wherein the lead gap is filled with a portion of the insulation sheet having a volume larger than or equal to 30% of a volume of the lead gap.

4. The encapsulated semiconductor device of claim 1 , wherein the insulation sheet is made of a material having a glass transition temperature higher than or equal to 160° C. and equal to or lower than 200° C.

5. The encapsulated semiconductor device of claim 1 , wherein the insulation sheet is made of a polyimide resin.

6. The encapsulated semiconductor device of claim 1 , wherein the semiconductor element bonded to the first conduction path formative plate is a power element.

7. The encapsulated semiconductor device of claim 1 , wherein a groove is formed in a region of the encapsulation resin around the heatsink.

8. An encapsulated semiconductor device comprising:

a first conduction path formative plate;

a second conduction path formative plate joined to the first conduction path formative plate;

a semiconductor element bonded to the first conduction path formative plate;

a heatsink held by the first conduction path formative plate with an insulation sheet interposed between the heatsink and the first conduction path formative plate; and

an encapsulation resin configured to encapsulate the first and second conduction path formative plates, wherein

a through hole or a lead gap is formed in a region of the first conduction path formative plate in contact with the insulation sheet,

insulation performance is increased b press-fitting the insulation sheet into the through hole or the lead gap to an extent that a void does not remain between the encapsulation resin and the insulation sheet,

an insertion portion of the second conduction path formative plate inserted into the through hole formed in the first conduction path formative plate is joined to the first conduction path formative plate, and

the insulation sheet is in contact with the insertion portion in the through hole.

9. An encapsulated semiconductor device comprising:

a first conduction path formative plate;

a second conduction path formative plate joined to the first conduction path formative plate;

a semiconductor element bonded to the first conduction path formative plate;

a heatsink held by the first conduction path formative plate with an insulation sheet interposed between the heatsink and the first conduction path formative plate; and

an encapsulation resin configured to encapsulate the first and second conduction path formative plates,

wherein a through hole or a lead gap is formed in a region of the first conduction path formative plate in contact with the insulation sheet,

the insulation sheet is press-fitted into the through hole or the lead gap, and

a diameter of one of openings of the through hole facing the insulation sheet is larger than a diameter of the other opening opposite to the insulation sheet.

10. The encapsulated semiconductor device of claim 9 , wherein a burr is formed on an edge of the opening of the through hole opposite to the insulation sheet.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →