IP Library Granted Patent US 8,867,259
Granted Patent B2
US 8,867,259 · App. 13/704,649 · Granted Oct 21, 2014

Method of programming variable resistance nonvolatile memory element

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Quick Facts
Patent No.
US 8,867,259
App. No.
13/704,649
Granted
Oct 21, 2014
Kind
B2
Abstract

A method of programming a variable resistance nonvolatile memory element that removes a defect in a resistance change, ensures an operation widow, and stably sustains a resistance change operation, the method including: applying, when the detect in the resistance change occurs in the variable resistance nonvolatile memory element, a recovery voltage pulse at least once to the variable resistance nonvolatile memory element, the recovery voltage pulse including: a first recovery voltage pulse that has an amplitude greater than amplitudes of a normal high resistance writing voltage pulse and a low resistance writing voltage pulse; and a second recovery voltage pulse that is the low resistance writing voltage pulse following the first recovery voltage pulse.

Claims (40)

1. A method of programming a variable resistance nonvolatile memory element, the method of programming reversibly changing, by applying a voltage pulse to the variable resistance nonvolatile memory element, a resistance state of the variable resistance nonvolatile memory element,

wherein the variable resistance nonvolatile memory element includes: a first electrode; a second electrode; and an oxygen-deficient transition metal oxide layer provided between the first and second electrodes,

the transition metal oxide layer includes: a first transition metal oxide layer that is in contact with the first electrode; and a second transition metal oxide layer that is in contact with the second electrode and has a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first transition metal oxide layer, and

after the variable resistance nonvolatile memory element is manufactured and an initial breakdown voltage pulse having a predetermined amplitude is applied between the first and second electrodes, the variable resistance nonvolatile memory element has characteristics of (i) changing to a low resistance state when a low resistance writing voltage pulse for providing a negative electric potential to the second electrode with respect to the first electrode is applied, and (ii) changing to a high resistance state when a high resistance writing voltage pulse for providing a positive electric potential to the second electrode with respect to the first electrode is applied, the high resistance state being higher in resistance value than the low resistance state,

the method of programming comprising,

in the case where the variable resistance nonvolatile memory element cannot change to the low resistance state and remains in the high resistance state when the low resistance writing voltage pulse is applied to the variable resistance nonvolatile memory element,

applying a recovery voltage pulse to the variable resistance nonvolatile memory element at least once, the recovery voltage pulse including: a first recovery voltage pulse that has an amplitude greater than an amplitude of the high resistance writing voltage pulse and provides the positive electric potential to the second electrode with respect to the first electrode; and a second recovery voltage pulse that follows the first recovery voltage pulse and provides the negative electric potential to the second electrode with respect to the first electrode.

2. The method of programming a variable resistance nonvolatile memory element according to claim 1 , comprising:

determining whether or not the variable resistance nonvolatile memory element has changed to the low resistance state by the application of the second recovery voltage pulse; and

repeating the applying of a recovery voltage pulse and the determining until the variable resistance nonvolatile memory element changes to the low resistance state.

3. The method of programming a variable resistance nonvolatile memory element according to claim 2 , comprising

applying a first re-breakdown voltage pulse to the variable resistance nonvolatile memory element at least once when the variable resistance nonvolatile memory element does not change to the low resistance state even after the applying of a recovery voltage pulse and the determining are repeated a predetermined number of times, the first re-breakdown voltage pulse having an amplitude greater than an amplitude of the first recovery voltage pulse.

4. The method of programming a variable resistance nonvolatile memory element according to claim 2 , comprising

applying a breakdown voltage pulse to the variable resistance nonvolatile memory element at least once when the variable resistance nonvolatile memory element does not change to the low resistance state even after the applying of a recovery voltage pulse and the determining are repeated a predetermined number of times, the breakdown voltage pulse including: a first re-breakdown voltage pulse that has an amplitude greater than an amplitude of the first recovery voltage pulse; and a second re-breakdown voltage pulse that follows the first re-breakdown voltage pulse and provides the negative electric potential to the second electrode with respect to the first electrode.

5. The method of programming a variable resistance nonvolatile memory element according to claim 1 ,

wherein the second recovery voltage pulse has an amplitude less than or equal to an amplitude of the low resistance writing voltage pulse.

6. The method of programming a variable resistance nonvolatile memory element according to claim 1 ,

wherein the first recovery voltage pulse has a pulse width greater than a pulse width of the second recovery voltage pulse.

7. The method of programming a variable resistance nonvolatile memory element according to claim 1 ,

wherein the first transition metal oxide layer is a layer having a composition expressed as TaO x , and

the second transition metal oxide layer is a layer having a composition expressed as TaO y where x<y.

8. A variable resistance nonvolatile memory device comprising:

a variable resistance nonvolatile memory element including: a first electrode; a second electrode; and an oxygen-deficient transition metal oxide layer provided between the first and second electrodes; and

a drive circuit,

wherein the transition metal oxide layer includes: a first transition metal oxide layer that is in contact with the first electrode; and a second transition metal oxide layer that is in contact with the second electrode and has a degree of oxygen deficiency lower than a degree of degree of oxygen deficiency of the first transition metal oxide layer,

after the variable resistance nonvolatile memory element is manufactured and an initial breakdown voltage pulse having a predetermined amplitude is applied between the first and second electrodes, the variable resistance nonvolatile memory element has characteristics of (i) changing to a low resistance state when a low resistance writing voltage pulse for providing a negative electric potential to the second electrode with respect to the first electrode is applied, and (ii) changing to a high resistance state when a high resistance writing voltage pulse for providing a positive electric potential to the second electrode with respect to the first electrode is applied, the high resistance state being higher in resistance value than the low resistance state, and

in the case where the variable resistance nonvolatile memory element cannot change to the low resistance state and remains in the high resistance state when the low resistance writing voltage pulse is applied to the variable resistance nonvolatile memory element, the drive circuit applies a recovery voltage pulse to the variable resistance nonvolatile memory element at least once, the recovery voltage pulse including: a first recovery voltage pulse that has an amplitude greater than an amplitude of the high resistance writing voltage pulse and provides the positive electric potential to the second electrode with respect to the first electrode; and a second recovery voltage pulse that follows the first recovery voltage pulse and provides the negative electric potential to the second electrode with respect to the first electrode.

9. The variable resistance nonvolatile memory device according to claim 8 ,

wherein the drive circuit determines whether or not the variable resistance nonvolatile memory element has changed to the low resistance state by the application of the second recovery voltage pulse, and repeats the application of the recovery voltage pulse and the determination until the variable resistance nonvolatile memory element changes to the low resistance state.

10. The variable resistance nonvolatile memory device according to claim 9 ,

wherein the drive circuit applies a first re-breakdown voltage pulse to the variable resistance nonvolatile memory element at least once when the variable resistance nonvolatile memory element does not change to the low resistance state even after the application of the recovery voltage pulse and the determination are repeated a predetermined number of times, the first re-breakdown voltage pulse having an amplitude greater than an amplitude of the first recovery voltage pulse.

11. The variable resistance nonvolatile memory device according to claim 9 ,

wherein the drive circuit applies a breakdown voltage pulse to the variable resistance nonvolatile memory element at least once when the variable resistance nonvolatile memory element does not change to the low resistance state even after the application of the recovery voltage pulse and the determination are repeated a predetermined number of times, the breakdown voltage pulse including: a first re-breakdown voltage pulse that has an amplitude greater than an amplitude of the first recovery voltage pulse; and a second re-breakdown voltage pulse that follows the first re-breakdown voltage pulse and provides the negative electric potential to the second electrode with respect to the first electrode.

12. The variable resistance nonvolatile memory device according to claim 8 ,

wherein the drive circuit applies, as the second recovery voltage pulse, a voltage pulse having an amplitude less than or equal to an amplitude of the low resistance writing voltage pulse, to the variable resistance nonvolatile memory element.

13. The variable resistance nonvolatile memory device according to claim 8 ,

wherein the drive circuit applies, as the first recovery voltage pulse, a voltage pulse having a pulse width greater than a pulse width of the second recovery voltage pulse, to the variable resistance nonvolatile memory element.

14. The variable resistance nonvolatile memory device according to claim 8 ,

wherein the first transition metal oxide layer is a layer having a composition expressed as TaO x , and

the second transition metal oxide layer is a layer having a composition expressed as TaO y where x<y.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0870 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2015
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 036334/0554 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 27, 2013
From: KAWAI, KEN; SHIMAKAWA, KAZUHIKO; KATOH, YOSHIKAZU; MURAOKA, SHUNSAKU
To: PANASONIC CORPORATION
Reel/Frame 030092/0306 →