Granted Patent B1

US 9,768,329 · App. 13/705,064 · Granted Sep 19, 2017

Abstract

Claims (42)

1. An optoelectronic semiconductor device comprising:

a first side and a second side, wherein the device is configured to receive light at the second side of the device;

a plurality of stacked p-n layers between the first side and the second side of the device, each of the plurality of stacked p-n layers comprising a p-doped layer and an n-doped layer, with a p-n junction between the p-doped layer and the n-doped layer such that at least one of the plurality of stacked p-n layers generates electrical energy when photons are absorbed by that p-n layer in response to the device being exposed to a light source on the second side of the device;

wherein each p-n layer has a first side and a second side, and the first side of each p-n layer is closer than its second side to the first side of the device;

wherein the p-n junction within each of the at least one electrical energy generating p-n layers is located closer to the first side of that p-n layer than it is to the second side of that p-n layer, and the p-n junction in the at least one electrical energy generating p-n layer that is located closest to the first side of the device is a heterojunction;

a window layer disposed closer to the second side of the device than each of the plurality of stacked p-n layers; and

a reflector disposed closer to the first side of the device than the plurality of stacked p-n layers, which provides for photons to be redirected to the plurality of stacked p-n layers to be absorbed and converted into electrical energy.

2. The optoelectronic device of claim 1 , wherein the reflector comprises a dielectric reflector.

3. The optoelectronic device of claim 1 , wherein the reflector comprises a textured reflector.

4. The optoelectronic device of claim 1 wherein the reflector has reflectivity such that light trapping, leading to enhanced photon recycling, is enabled and the performance including the open circuit voltage of the device is enhanced.

5. The optoelectronic device of claim 1 where the polarity of all layers is reversed.

6. An optoelectronic semiconductor device comprising:

a first side and a second side, wherein the device is configured to receive light at the second side of the device;

a plurality of stacked p-n layers, between the first side and the second side of the device, each of the plurality of stacked p-n layers comprising a p-doped layer and an n-doped layer, with a p-n junction between the p-doped layer and the n-doped layer such that at least one of the plurality of stacked p-n layers generates electrical energy when photons are absorbed by that p-n layer in response to the device being exposed to a light source on the second side of the device;

wherein each p-n layer has a first side and a second side, and the first side of each p-n layer is closer than its second side to the first side of the device;

wherein the p-n junction within each of the at least one electrical energy generating p-n layers is located closer to the first side of that p-n layer than it is to the second side of that p-n layer;

a window layer disposed closer to the second side of the device than each of the plurality of stacked p-n layers; and

a heterojunction is formed within one or more of the p-n layers.

7. The optoelectronic device of claim 6 , wherein the one or more heterojunction is at a location offset from its corresponding p-n junction.

8. The optoelectronic device of claim 7 , wherein the location offset of the one or more heterojunction from its corresponding p-n junction is provided by an intermediate layer located between the p-doped layer and the n-doped layer, the intermediate layer being of the same material as either the n-doped layer or the p-doped layer, or being comprised of a different material, or being a layer of graded composition.

9. The optoelectronic device of claim 6 , wherein the one or more heterojunction is located within two depletion lengths of its corresponding p-n junction.

10. The optoelectronic device of claim 6 , where the polarity of all layers is reversed.

11. An optoelectronic semiconductor device comprising:

a first side and a second side, wherein the device is configured to receive light at the second side of the device;

a plurality of stacked p-n layers, between the first side and the second side of the device, each of the plurality of stacked p-n layers comprising a p-doped layer and an n-doped layer, with a p-n junction between the p-doped layer and the n-doped layer such that at least one of the plurality of stacked p-n layers generates electrical energy when photons are absorbed by that p-n layer in response to the device being exposed to a light source on the second side of the device;

wherein each p-n layer has a first side and a second side, and the first side of each p-n layer is closer than its second side to the first side of the device;

wherein the p-n junction within each of the at least one electrical energy generating p-n layer is located closer to the first side of that p-n layer than it is to the second side of that p-n layer, and the p-n junction in the at least one electrical energy generating p-n layer that is located closest to the first side of the device is a heterojunction;

a heavily doped front contact layer disposed on the plurality of stacked p-n junctions;

at least one metal layer disposed on the front contact layer; and

wherein an ohmic contact is formed between the at least one metal layer and the front contact layer without annealing being necessary to achieve the ohmic contact.

12. The optoelectronic device of claim 11 , wherein the front contact layer includes gallium arsenide.

13. The optoelectronic device of claim 11 , wherein the front contact layer has a doping concentration of at least 5×10 18 cm 3 .

14. The optoelectronic device of claim 11 , where the polarity of all layers is reversed.

15. An optoelectronic semiconductor device comprising:

a first side and a second side, wherein the device is configured to receive light at the second side of the device;

a plurality of stacked p-n layers, between the first side and the second side of the device, each of the plurality of stacked p-n layers comprising a p-doped layer and an n-doped layer, with a p-n junction between the p-doped layer and the n-doped layer such that at least one of the plurality of stacked p-n layers generates electrical energy when photons are absorbed by that p-n layer in response to the device being exposed to a light source on the second side of the device;

wherein each p-n layer has a first side and a second side, and the first side of each p-n layer is closer than its second side to the first side of the device;

wherein the p-n junction within each of the at least one electrical energy generating p-n layer is located closer to the first side of that p-n layer than it is to the second side of that p-n layer, and the p-n junction in the at least one electrical energy generating p-n layer that is located closest to the first side of the device is a heterojunction;

a window layer disposed closer to the second side of the device than each of the plurality of stacked p-n layers; and

one or more filter layers that act as optical filters between two or more of the plurality of stacked p-n layers, such that when the second side of the device is exposed to the light source, each of the one or more filter layers is engineered to:

reflect photons with energy greater than or equal to the bandgap energy of the p-n layers between that filter layer and the second side of the device, and

concurrently transmit photons with energy lower than the bandgap energy of the p-n layers between that filter layer and the second side of the device.

Assignments (10)