Envelope detector and method for detecting an envelope of a signal to be amplified by a power amplifier
View Patent ↗An envelope detector includes an input receiving a digital input signal indicative of a magnitude of a signal to be amplified by a power amplifier. A circuit is provided for generating an analog envelope signal based on the digital input signal. The envelope detector includes an output for outputting the analog envelope signal.
1. An envelope detector comprising:
an input configured to receive a digital input signal indicative of a magnitude of a digital signal to be amplified by a power amplifier, wherein the digital input signal is at least a portion of the digital signal to be amplified;
a digital signal processing unit connected to the input and configured to process the digital input signal;
a digital low-pass filter connected to the digital processing unit and configured to reduce a bandwidth of the processed digital input signal;
a digital-to-analog converter (DAC) connected to the digital low-pass filter and configured to convert the low-pass filtered, processed digital input signal into an analog signal;
an analog low-pass filter connected to the DAC and configured to low-pass filter the analog signal for attenuating high frequency noise; and
an output connected to the analog low-pass filter and configured to output the low-pass filtered analog signal.
2. The envelope detector of claim 1 , wherein the digital signal to be amplified is provided in the polar domain, and wherein the digital input signal comprises a magnitude signal of the digital signal.
3. The envelope detector of claim 1 , wherein the digital signal to be amplified is provided in the I/O domain, wherein the digital input signal comprises the I-signal and the Q-signal of the digital signal, and wherein the digital signal processing unit is configured to generate a magnitude signal based on the I- and Q-signals.
4. A circuit, comprising:
an input configured to receive a digital baseband signal, the digital baseband signal comprising a digital signal indicative of a magnitude of a radio frequency (RF) output signal to be transmitted;
one or more RF-digital to analog converters (RF-DACs) configured to generate the RF output signal based on the digital baseband signal; and
an envelope detector configured to provide an analog envelope signal to the one or more RF-DACs, wherein the envelope detector comprises;
an input configured to receive the digital input signal indicative of a magnitude of a signal to be amplified by a power amplifier;
a circuit configured to generate an analog envelope signal based on the digital input signal; and
an output configured to output the analog envelope signal.
5. The circuit of claim 4 , further comprising a power amplifier bias circuit coupled to the output of the envelope detector and configured to generate a power amplifier bias signal based on the analog envelope signal, the power amplifier bias circuit comprising an output configured to provide the generated power amplifier bias signal.
6. The circuit of claim 5 , further comprising a power amplifier comprising an input configured to receive the RF output signal from the RF-DAC, a bias input connected to the output of the power amplifier bias circuit, and an output configured to provide the amplified RF output signal.
7. The circuit of claim 4 , further comprising a predistortion stage configured to apply a predefined distortion to the digital baseband signal prior to being provided to the circuit input.
8. A transmitter, comprising:
an input configured to receive a digital baseband signal, the digital baseband signal comprising a digital signal indicative of a magnitude of an RF output signal to be transmitted;
one or more RF-DACs configured to generate the RF output signal based on the digital baseband signal;
an envelope detector configured to provide an analog envelope signal to the one or more RF-DACs, wherein the envelope detector comprises;
an input configured to receive the digital baseband signal indicative of a magnitude of a signal to be amplified by a power amplifier;
a circuit configured to generate an analog envelope signal based on the digital input signal; and
an output configured to output the analog envelope signal;
a power amplifier bias circuit coupled to the output of the envelope detector and configured to generate a power amplifier bias signal based on the analog envelope signal, the power amplifier bias circuit comprising an output configured to provide the generated power amplifier bias signal; and
a power amplifier comprising an input configured to receive the RF output signal from the RF-DAC, a bias input connected to the output of the power amplifier bias circuit, and an output configured to provide the amplified RF output signal.
9. The transmitter of claim 8 , further comprising an antenna port connected to the output of the power amplifier, and configured to connect an antenna to the output of the power amplifier.