Method of manufacturing semiconductor device

1. A method of manufacturing a semiconductor device, the method comprising:

forming an isolation portion in a groove of a substrate;

forming a projection portion in which an upper portion of the isolation portion projects from a surface of the substrate;

forming a sidewall spacer covering a side surface of the projection portion and part of the surface of the substrate along the side surface of the projection portion; and

forming a first trench in the substrate by etching the substrate using the sidewall spacer as a mask.

2. A method of manufacturing a semiconductor device, the method comprising:

forming isolation portions in grooves of a substrate;

forming at least a pair of projection portions in which upper portions of the isolation portions project from a surface of the substrate;

forming sidewall spacers covering side surfaces of the projection portions and part of the surface of the substrate along the side surfaces of the projection portions; and

forming a first trench in the substrate by etching the substrate using the sidewall spacers as a mask,

wherein the forming of the sidewall spacers includes forming a window to expose the surface of the substrate between the sidewall spacers of the at least the pair of projection portions facing each other.

3. The method as recited in claim 2 , wherein the forming of the isolation portions includes:

forming a sacrifice film on the substrate,

forming grooves opening through the sacrifice film and extending into the substrate,

forming isolation portions filling in the grooves with a first insulator film having an upper surface so that the upper surface is placed between a top surface of the sacrifice film and the surface of the substrate, and

removing the sacrifice film to form the projection portion in which the upper surface of the first insulator film projects from the surface of the substrate that is covered with the sacrifice film.

4. The method as recited in claim 3 , wherein the forming the isolation portions includes filling the first insulator film so that an upper surface of the first insulator film has substantially the same plane with the top surface of the sacrifice film, and

the forming the sacrifice film includes controlling a thickness has the same as a desired height of the projection portions.

5. The method as recited in claim 4 , wherein the forming the at least the pair of projection portions includes forming the projection portions which are greater in height than a thickness of the protective film, and

the forming the protective film includes controlling a thickness having the desired distance from the side surface of the projection portion.

6. The method as recited in claim 2 , wherein the forming the sidewall spacers includes:

forming a protective film with a conformal step coverage on the projection portions, and

anisotropic etching the protective film so as to leave the sidewall spacer along the side surfaces of the projection portions.

7. The method as recited in claim 6 , wherein the forming two of the first trench in the substrate, further comprises:

forming a second trench by depositing the protective film with a conformal step coverage on the projection portions;

forming a third trench by depositing a second insulator film with a conformal step coverage on the protective film;

forming a third insulator film on the second insulator film so as to fill in the third trench;

selectively etching the third insulator film to expose the second insulator film at a region between the third trenches;

forming a belt-like pattern by selectively etching the second insulator film so as to remain under the third insulating film, using the third insulator film as a mask, in the third trenches; and

removing remaining third insulator film,

the forming sidewall spacers includes the anisotropic etching the protective film using the belt-like pattern as a mask,

the forming the first trenches includes the etching the substrate between the sidewall spacers and the belt-like pattern.

8. The method as recited in claim 7 , wherein the protective film is a material having a high etching selectivity to the second insulator film and the substrate.

9. The method as recited in claim 7 , wherein the second insulator film is a material having a high etching selectivity to the third insulator film.

10. The method as recited in claim 3 , wherein the forming the first trench includes forming the first trench which is smaller in depth than the groove.

11. The method as recited in claim 3 , further comprising forming an etching stopper film on the substrate under the sacrifice film, the etching stopper film protecting the substrate from an etchant used to remove the sacrifice film.

12. The method as recited in claim 11 , wherein the substrate is silicon, the sacrifice film includes doped silicon film, the etchant to remove the sacrifice film contains an ammonia solution.

13. The method as recited in claim 3 , further comprising forming device isolation regions on the surface of the substrate before the forming of the isolation portions, the device isolation regions crossing the isolation portions and defining both ends of an active region,

wherein the first insulator film is a material having a high etching selectivity to the device isolation regions and the active region.

14. The method as recited in claim 13 , further comprising forming an diffusion region in the active region after the removing the sacrifice film,

wherein the forming the first trench includes dividing the diffusion region into a first diffusion region and a second diffusion region.

15. The method as recited in claim 14 , further comprising:

forming a gate insulator film covering an inside surface of a lower portion of the first trench; and

forming a gate electrode filling the lower portion of the first trench via the gate insulator film.

16. The method as recited in claim 15 , further comprising forming a buried insulator film filling an upper portion of the first trench and covering an upper surface of the gate electrode.

17. The method as recited in claim 14 , further comprising:

forming a bit contact in contact with the first diffusion region;

forming a bit line connecting electrically with the bit contact;

forming an interlayer dielectric film covering the bit line; and

forming a capacity contact plug extending through the interlayer dielectric film, the capacity contact plug being in contact with the second diffusion region.

18. The method as recited in claim 14 , further comprising:

forming a gate insulator film covering an inside surface of a lower portion of the first trench; and

forming a gate electrode filling the lower portion of the first trench via the gate insulator film,

wherein the gate electrode projects from the surface of the substrate.

19. The method as recited in claim 18 , further comprising:

forming an interlayer dielectric film covering part of the gate electrode that projects from the surface; and

forming at least two contact plugs that each contacts with the first diffusion region and the second diffusion region and that extends through the interlayer dielectric film.

20. A method of manufacturing a semiconductor device, the method comprising:

forming isolation portions in grooves of a substrate;

forming at least a pair of projection portions in which upper portions of the isolation portions project from the surface of the substrate;

forming sidewall spacers, a belt-like pattern and windows in the same process step, the sidewall spacers covering each side surface of the projection portions and part of the surface of the substrate along the side surface of the projection portions, the belt-like pattern arranged between the sidewall spacers of at least the pair of projection portions facing each other, the window exposing the surface of the substrate between the sidewall spacer and the belt-like pattern; and

forming a first trench in the substrate by etching using the sidewall spacers and the belt-like pattern as a mask.