IP Library Granted Patent US 8,873,270
Granted Patent B2
US 8,873,270 · App. 13/715,712 · Granted Oct 28, 2014

Pulse generator and ferroelectric memory circuit

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Quick Facts
Patent No.
US 8,873,270
App. No.
13/715,712
Granted
Oct 28, 2014
Kind
B2
Abstract

A pulse generator circuit with ferroelectric memory element is disclosed that is optimized for printed, solution-processed thin film transistor processing. In certain embodiments, the circuit comprises dual thin film transistors that operate as a diode and resistor, respectively. Optionally, a third thin film transistor may be provided to operate as a pass transistor in response to an enable signal. The elements of the circuit are configured such that a rising pulse on an input node triggers an output pulse on an output node in the manner of a monostable multivibrator. The ferroelectric memory element is coupled to the output node such that a pulse on the output node may change a state of the ferroelectric memory element.

Claims (39)

1. An electronic pulse-generator circuit and ferroelectric memory, comprising:

an input node;

a capacitor communicatively connected to said input node and to a pulse line;

a first thin film transistor having a channel formed of a first polarity solution-processed semiconductor material, a first side of said channel communicatively connected to a first voltage source, a second side of said channel communicatively connected to said pulse line, said first thin film transistor configured to function as a diode;

a second thin film transistor having a channel formed of said first polarity solution-processed semiconductor material, a first side of said channel communicatively connected to said pulse line, a second side of said channel communicatively connected to a second voltage source, said second thin film transistor configured to function as a resistor;

an output node communicatively connected to receive a pulse from said pulse line; and

a ferroelectric memory element communicatively coupled to said output node such that a pulse on said output node may change a state of said ferroelectric memory element.

2. The electronic pulse-generator circuit of claim 1 wherein said first polarity solution-processed semiconductor material is P-type.

3. The electronic pulse-generator circuit of claim 1 , further comprising a third thin film transistor having a channel formed of said first polarity solution-processed semiconductor material, a first side of said channel communicatively connected to said pulse line, a second side of said channel communicatively connected to said output node, and further comprising a gate communicatively connected to a first enable signal line.

4. The electronic pulse-generator circuit of claim 3 , further comprising a fourth thin film transistor having a channel formed of said first polarity solution-processed semiconductor material, a first side of said channel communicatively connected to said pulse line at said output node, a second side of said channel communicatively connected to a third voltage source, and further comprising a gate communicatively connected to a second enable signal line.

5. The electronic pulse-generator circuit of claim 3 , wherein said first side of said channel of said second thin film transistor is communicatively connected to said pulse line at said output node.

6. The electronic pulse-generator circuit of claim 5 , wherein said second thin film transistor further comprises a gate communicatively connected to a third enable signal line.

7. The electronic pulse-generator circuit of claim 3 , wherein said second voltage source is ground.

8. The electronic pulse-generator circuit of claim 1 , wherein said first polarity solution-processed semiconductor material is N-type.

9. The electronic pulse-generator circuit of claim 8 , wherein said first thin film transistor comprises a gate communicatively connected to said first voltage source, and further wherein said second thin film transistor further comprises a gate communicatively connected to said pulse line, said capacitor, and said second side of said channel of said first thin film transistor.

10. The electronic pulse-generator circuit of claim 1 , wherein said first thin film transistor further comprises a gate communicatively connected to said pulse line, said capacitor, and said second side of said channel of said first thin film transistor, and further wherein said second thin film transistor further comprises a gate communicatively connected to ground.

11. An electronic pulse-generator circuit, comprising:

an input node;

an output node;

a capacitor communicatively connected to said input node and to a pulse line;

a first thin film transistor having a channel formed of a p-type solution-processed semiconductor material, a first side of said channel communicatively connected to a voltage source, a second side of said channel communicatively connected to said pulse line, said first thin film transistor configured to function as a diode;

a second thin film transistor having a channel formed of p-type solution-processed semiconductor material, a first side of said channel communicatively connected to said pulse line, a second side of said channel communicatively connected to ground, said second thin film transistor configured to function as a resistor;

a third thin film transistor having a channel formed of p-type solution-processed semiconductor material, a first side of said channel communicatively connected to said pulse line, a second side of said channel communicatively connected to said output node, and further comprising a gate communicatively connected to a first enable signal line; and

a ferroelectric memory element communicatively coupled to said output node such that a pulse on said output node may change a state of said ferroelectric memory element.

12. The electronic pulse-generator circuit of claim 11 , further comprising a fourth thin film transistor having a channel formed of p-type semiconductor material, a first side of said channel communicatively connected to said pulse line at said output node, a second side of said channel communicatively connected to ground, and further comprising a gate communicatively connected to a second enable signal line.

13. The electronic pulse-generator circuit of claim 11 , wherein said first side of said channel of said second thin film transistor is communicatively connected to said pulse line at said output node.

14. The electronic pulse-generator circuit of claim 13 , wherein said second thin film transistor further comprises a gate communicatively connected to a third enable signal line.

15. The electronic pulse-generator circuit of claim 14 , wherein said third enable signal line is communicatively connected to ground.

16. An electronic pulse-generator circuit, comprising:

an input node;

an output node;

a capacitor communicatively connected to said input node and to a pulse line;

a first thin film transistor having a channel formed of a printed p-type organic semiconductor material, a first side of said channel communicatively connected to a voltage source, a second side of said channel communicatively connected to said pulse line, said first thin film transistor configured to function as a diode;

a second thin film transistor having a channel formed of printed p-type organic semiconductor material, a first side of said channel communicatively connected to said pulse line, a second side of said channel communicatively connected to ground, said second thin film transistor configured to function as a resistor;

a third thin film transistor having a channel formed of printed p-type organic semiconductor material, a first side of said channel communicatively connected to said pulse line, a second side of said channel communicatively connected to said output node, and further comprising a gate communicatively connected to a first enable signal line;

a fourth thin film transistor having a channel formed of printed p-type semiconductor material, a first side of said channel communicatively connected to said pulse line at said output node, a second side of said channel communicatively connected to ground, and further comprising a gate communicatively connected to a second enable signal line; and

a ferroelectric memory element communicatively coupled to said output node such that a pulse on said output node may change a state of said ferroelectric memory element.

17. The electronic pulse-generator circuit of claim 16 , wherein said first side of said channel of said second thin film transistor is communicatively connected to said pulse line at said output node.

18. The electronic pulse-generator circuit of claim 17 , wherein said second thin film transistor further comprises a gate communicatively connected to ground.

Assignments (10)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2025
From: XEROX CORPORATION
To: GENESEE VALLEY INNOVATIONS, LLC
Reel/Frame 073842/0479 →
SECOND LIEN NOTES PATENT SECURITY AGREEMENT Recorded Jul 2, 2025
From: XEROX CORPORATION
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 071785/0550 →
FIRST LIEN NOTES PATENT SECURITY AGREEMENT Recorded Apr 11, 2025
From: XEROX CORPORATION
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 070824/0001 →
SECURITY INTEREST Recorded Feb 13, 2024
From: XEROX CORPORATION
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 066741/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT RF 064760/0389 Recorded Feb 13, 2024
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: XEROX CORPORATION
Reel/Frame 068261/0001 →
SECURITY INTEREST Recorded Nov 20, 2023
From: XEROX CORPORATION
To: JEFFERIES FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 065628/0019 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVAL OF US PATENTS 9356603, 10026651, 10626048 AND INCLUSION OF US PATENT 7167871 PREVIOUSLY RECORDED ON REEL 064038 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jun 28, 2023
From: PALO ALTO RESEARCH CENTER INCORPORATED
To: XEROX CORPORATION
Reel/Frame 064161/0001 →
SECURITY INTEREST Recorded Jun 22, 2023
From: XEROX CORPORATION
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 064760/0389 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2023
From: PALO ALTO RESEARCH CENTER INCORPORATED
To: XEROX CORPORATION
Reel/Frame 064038/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2012
From: SCHWARTZ, DAVID ERIC
To: PALO ALTO RESEARCH CENTER INCORPORATED
Reel/Frame 029474/0766 →