IP Library Granted Patent US 9,208,982
Granted Patent B2
US 9,208,982 · App. 13/716,013 · Granted Dec 8, 2015

Systems and methods for distributing power to integrated circuit dies

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Quick Facts
Patent No.
US 9,208,982
App. No.
13/716,013
Granted
Dec 8, 2015
Kind
B2
Abstract

Systems and methods for distributing power to a plurality of integrated circuit dies are provided. In some aspects, a system includes a substrate and a plurality of integrated circuit dies disposed on the substrate. Each of the plurality of integrated circuit dies includes a circuit and a target inductive element coupled to the circuit. The system also includes a power supply module configured to generate a source power signal. The system also includes at least one source inductive element configured to electromagnetically couple the source power signal to one or more of the plurality of the target inductive elements to generate one or more target power signals that supply power to one or more corresponding circuits.

Claims (32)

1. A system for distributing power to a plurality of integrated circuit dies, the system comprising:

a substrate;

a plurality of integrated circuit dies disposed on the substrate, wherein each of the plurality of integrated circuit dies comprises a circuit and a target inductive element coupled to the circuit;

a power supply circuit configured to generate a source power signal; and

at least one source inductive element configured to selectively electromagnetically couple the source power signal to one or more of the plurality of the target inductive elements to generate one or more target power signals that supply power to one or more corresponding circuits.

2. The system of claim 1 , wherein the substrate comprises the at least one source inductive element.

3. The system of claim 1 , further comprising at least one switch configured to select a set of the plurality of integrated circuit dies, wherein the at least one source inductive element is configured to electromagnetically couple the source power signal to a set of target inductive elements corresponding to the selected set of integrated circuit dies to generate one or more corresponding target power signals that supply power to a set of corresponding circuits.

4. The system of claim 3 , wherein the substrate comprises the at least one switch.

5. The system of claim 3 , wherein the set of integrated circuit dies each comprises a respective one of the at least one switch.

6. The system of claim 3 , wherein the at least one source inductive element comprises the at least one switch.

7. The system of claim 3 , wherein the at least one switch is configured to select the set of integrated circuit dies such that alignment between the at least one source inductive element and the set of corresponding target inductive elements is maximized.

8. The system of claim 1 , further comprising at least one detector configured to measure a parameter, the parameter comprising at least one of a target impedance encountered by the one or more target inductive elements, a source impedance encountered by the at least one source inductive element, a frequency of the source power signal, a frequency of the one or more target power signals, a magnitude of the source power signal, a magnitude of the one or more target power signals, a source voltage across the at least one source inductive element, and a target voltage across the one or more target inductive elements.

9. The system of claim 8 , further comprising at least one tuner coupled to the at least one detector, the at least one tuner configured to adjust the parameter such that the power supplied to the one or more circuits is maximized.

10. The system of claim 9 , wherein the at least one tuner is configured to (a) match the source impedance to the target impedance, and/or (b) match the frequency of the source power signal to the frequency of the one or more target power signals.

11. The system of claim 9 , wherein each of the at least one tuner comprises at least one of a phase-locked loop, an inductor, a capacitor, and a tuning switch.

12. A method for distributing power to a plurality of integrated circuit dies, the method comprising:

providing a plurality of integrated circuit dies disposed on a substrate, wherein each of the plurality of integrated circuit dies comprises a circuit and a target inductive element coupled to the circuit;

generating, by a power supply circuit, a source power signal; and

selectively electromagnetically coupling, using at least one source inductive element, the source power signal to a set of the plurality of the target inductive elements to generate one or more target power signals that supply power to a set of corresponding circuits.

13. The method of claim 12 , further comprising selecting, using at least one switch, a set of the plurality of integrated circuit dies that comprise the set of corresponding circuits.

14. The method of claim 12 , wherein the source power signal comprises an alternating current signal.

15. The method of claim 12 , further comprising measuring, using at least one detector, a parameter, the parameter comprising at least one of a target impedance encountered by the one or more target inductive elements, a source impedance encountered by the at least one source inductive element, a frequency of the source power signal, a frequency of the one or more target power signals, a magnitude of the source power signal, a magnitude of the one or more target power signals, a source voltage across the at least one source inductive element, and a target voltage across the one or more target inductive elements.

16. The method of claim 15 , further comprising adjusting, using at least one tuner coupled to the at least one detector, the parameter such that the power supplied to the one or more circuits is maximized.

17. A system for distributing power to a plurality of integrated circuit dies, the system comprising:

a substrate comprising at least one source inductive element;

a plurality of integrated circuit dies disposed on the substrate, wherein each of the plurality of integrated circuit dies comprises a circuit and a target inductive element coupled to the circuit;

a power supply circuit configured to generate a source power signal; and

at least one switch configured to select a set of the plurality of integrated circuit dies,

wherein the at least one source inductive element is configured to electromagnetically couple the source power signal to a set of target inductive elements corresponding to the selected set of integrated circuit dies to generate one or more target power signals that supply power to a set of corresponding circuits.

18. The system of claim 17 , further comprising at least one detector configured to measure a parameter, the parameter comprising at least one of a target impedance encountered by the set of target inductive elements, a source impedance encountered by the at least one source inductive element, a frequency of the source power signal, a frequency of the one or more target power signals, a magnitude of the source power signal, a magnitude of the one or more target power signals, a source voltage across the at least one source inductive element, and a target voltage across the set of target inductive elements.

19. The system of claim 18 , further comprising at least one tuner coupled to the at least one detector, the at least one tuner configured to adjust the parameter such that the power supplied to the one or more circuits is maximized.

20. The system of claim 18 , wherein the at least one switch is configured to select the set of integrated circuit dies based on the measured parameter such that the power supplied to the one or more circuits is maximized.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2012
From: ROFOUGARAN, AHMADREZA
To: BROADCOM CORPORATION
Reel/Frame 029523/0145 →