IP Library Granted Patent US 8,497,181
Granted Patent B1
US 8,497,181 · App. 13/716,177 · Granted Jul 30, 2013

Semiconductor device and method of manufacturing the same

Inventor: Wensheng Wang (Kawasaki, JP)
Assignee: Fujitsu Semiconductor Limited
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Quick Facts
Patent No.
US 8,497,181
App. No.
13/716,177
Granted
Jul 30, 2013
Kind
B1
Abstract

An FeRAM is produced by a method including the steps of forming a lower electrode layer, forming a first ferroelectric film on the lower electrode layer, forming on the first ferroelectric film a second ferroelectric film in an amorphous state containing iridium inside, thermally treating the second ferroelectric film in an oxidizing atmosphere to crystallize the second ferroelectric film and to cause iridium in the second ferroelectric film to diffuse into the first ferroelectric film, forming an upper electrode layer on the second ferroelectric film, and processing each of the upper electrode layer, the second ferroelectric film, the first ferroelectric film, and the lower electrode layer to form the capacitor structure. With such a structure, the inversion charge amount in a ferroelectric capacitor structure is improved without increasing the leak current pointlessly, and a high yield can be assured, thereby realizing a highly reliable FeRAM.

Claims (11)

1. A method of manufacturing a semiconductor device having a capacitor structure sandwiching a capacitor film constituted of a dielectric material by a lower electrode and an upper electrode above a semiconductor substrate, the method comprising, when forming the capacitor structure, the steps of:

forming a lower electrode layer;

forming a dielectric film in an amorphous state on the lower electrode layer;

performing first thermal treatment on the dielectric film in an oxidizing atmosphere to crystallize the dielectric film;

forming on the dielectric film an upper electrode layer containing iridium inside;

performing second thermal treatment on the upper electrode layer in an oxidizing atmosphere to cause iridium in the upper electrode layer to diffuse into the dielectric film; and

processing each of the upper electrode layer, the dielectric film, and the lower electrode layer to form the capacitor structure.

2. The method of manufacturing the semiconductor device according to claim 1 , wherein the upper electrode layer is a multilayered structure,

a lowest layer of the upper electrode layer is formed with composition of IrO x (0<x<2) on the dielectric film,

the second thermal treatment is performed on the lowest layer to cause iridium in the lowest layer to diffuse into the dielectric film, and

thereafter a remaining layer of the upper electrode layer is formed on the lowest layer to thereby complete the upper electrode layer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2020
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR MEMORY SOLUTION LIMITED
Reel/Frame 053195/0249 →
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2013
From: WANG, WENSHENG
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 030222/0364 →
Continuity (3)
Division 13108230 · May 16, 2011
Division 12239332 · Sep 26, 2008
Continuation PCTJP2006306654 · Mar 30, 2006