IP Library Granted Patent US 9,325,062
Granted Patent B2
US 9,325,062 · App. 13/717,441 · Granted Apr 26, 2016

High speed tunable matching network for antenna systems

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Quick Facts
Patent No.
US 9,325,062
App. No.
13/717,441
Granted
Apr 26, 2016
Kind
B2
Abstract

A communication system is provided, including an antenna, a matching network coupled to the antenna, a controller configured to host an algorithm for controlling the matching network, and a look-up table coupled to the controller. The look-up table includes characterization data according to frequency bands and conditions. The controller is configured to refer to the look-up table to determine optimum impedance for a frequency band selected under a condition detected during a time interval, and adjust the matching network to provide the optimum impedance. Part or all of the sections related to the tunable matching scheme can be integrated on a chip.

Claims (30)

1. A communication system comprising:

an antenna;

a matching network coupled to the antenna;

a controller configured to control the matching network; and

a look-up table coupled to the controller, the look-up table including characterization data according to frequency bands and conditions,

wherein

the controller is configured to refer to the look-up table to determine optimum impedance for a frequency band selected and under a condition detected during a time interval, and adjust the matching network to provide the optimum impedance,

and wherein

the controller and the look-up table are integrated on a chip;

further characterized in that:

the matching network comprises a plurality of switches, each switch coupled to one or more cells,

wherein

each cell comprises one or more capacitors, one or more inductors, or a combination of one or more capacitors and one or more inductors,

and wherein

the controller is configured to adjust the matching network by turning on one or more of the plurality of switches to provide the optimum impedance for the frequency band and the condition, based on a configuration of the cells coupled to the one or more of the plurality of switches that are turned on.

2. The communication system of claim 1 , wherein the controller and the look-up table are integrated on a field-programmable gate array (FPGA).

3. The communication system of claim 1 , wherein the matching network is integrated with the controller and the look-up table on the chip.

4. The communication system of claim 3 , wherein the look-up table is implemented on a memory.

5. The communication system of claim 4 , wherein the memory is a read only memory (ROM) or a random access memory (RAM).

6. A method for impedance matching of a communication system that includes an antenna, a matching network coupled to the antenna, a controller configured to control the matching network, and a look-up table coupled to the controller, the look-up table including characterization data according to frequency bands and conditions, wherein the controller is configured to refer to the look-up table to determine optimum impedance for a frequency band selected and under a condition detected during a time interval, and adjust the matching network to provide the optimum impedance, the method comprising:

first adjusting the matching network to provide a first impedance that is optimum for a first frequency band and a first condition;

second adjusting the matching network to provide a second impedance that is optimum for a second frequency band and a second condition, wherein a transition from the first impedance to the second impedance is configured to avoid path discontinuity; and

third adjusting the matching network, between the first and second adjusting, to provide a third impedance based on a configuration sequence to avoid the path discontinuity during the transition from the first to the third impedance and from the third to the second impedance;

further characterized in that:

the matching network includes a plurality of switches, each switch coupled to one or more cells, wherein

the first adjusting comprises turning on first one or more of the plurality of switches to provide the first impedance determined b the cells coupled led to the first one or more of the plurality of switches,

the third adjusting comprises keeping on at least one switch of the first one or more of the plurality of switches while turning off the other switches and turning on second one or more switches coupled to the cells corresponding to the second impedance; and

the second adjusting comprises turning off the at least one switch of the first one or more of the plurality of switches while keeping on the second one or more switches to provide the second impedance.

7. The method of claim 6 , wherein

a fast switching speed is provided by integrating the controller, the look-up table and the matching network on a chip.

Assignments (6)
CHANGE OF NAME Recorded May 5, 2023
From: ETHERTRONICS, INC.
To: AVX ANTENNA, INC.
Reel/Frame 063549/0336 →
CHANGE OF NAME Recorded May 4, 2023
From: AVX ANTENNA, INC.
To: KYOCERA AVX COMPONENTS (SAN DIEGO), INC.
Reel/Frame 063543/0302 →
RELEASE OF SECURITY INTEREST Recorded Jan 31, 2018
From: NH EXPANSION CREDIT FUND HOLDINGS LP
To: ETHERTRONICS, INC.
Reel/Frame 045210/0725 →
SECURITY INTEREST Recorded Oct 21, 2016
From: ETHERTRONICS, INC.
To: NH EXPANSION CREDIT FUND HOLDINGS LP
Reel/Frame 040464/0245 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2016
From: DESCLOS, LAURENT; PAJONA, OLIVIER
To: ETHERTRONICS, INC
Reel/Frame 038075/0060 →
SECURITY INTEREST Recorded Feb 10, 2015
From: ETHERTRONICS, INC.
To: SILICON VALLEY BANK
Reel/Frame 034945/0258 →