IP Library Granted Patent US 9,063,922
Granted Patent B2
US 9,063,922 · App. 13/718,455 · Granted Jun 23, 2015

Firmware generated register file for use in hardware validation

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,063,922
App. No.
13/718,455
Granted
Jun 23, 2015
Kind
B2
Abstract

When testing or validating a hardware system, a script file representing a portion of the firmware may be used to test the system instead of using the firmware code itself. For example, the script file may be plurality of register commands that perform the same initialization sequence as the firmware. Before connecting the hardware system to firmware drivers, the script file may be used to debug the initialization sequence. Instead of generating this script file manually, a firmware testing tool may be used. While executing the firmware, the tool may record the different register access commands performed during the initialization process. The script file is then generated programmatically using these recorded commands without requiring input from the system designer. The generated script file may then be tested on the hardware system to determine whether the command sequence in the script file forces the hardware system into the desired state.

Claims (29)

1. A computer program product for testing a design of a hardware system, the computer program product comprising:

a computer-readable storage medium having computer-readable program code embodied therewith, the computer-readable program code comprising computer-readable program code configured to:

execute firmware in a firmware testing tool, the firmware testing tool comprising a simulated model of the hardware system, wherein, while executing the firmware, the firmware testing tool writes data to registers in the simulated model that force the simulated model into a desired state;

record values written to the registers while executing the firmware; and

convert the recorded values into a plurality of register commands to generate a script, wherein the script is configured to, when executed on a testing apparatus, force a physical representation of the hardware system into the desired state.

2. The computer program product of claim 1 , further comprising computer-readable program code configured to, upon determining that the script does not force the physical representation of the hardware system into the desired state:

execute updated firmware in the firmware testing tool;

record new values written to the registers while executing the updated firmware; and

convert the new values into a different plurality of register commands to generate a new script.

3. The computer program product of claim 1 , wherein the script is configured to be used by the testing apparatus to write values to registers in the physical representation of the hardware system.

4. The computer program product of claim 1 , wherein the plurality of register commands in the script is arranged in a sequence configured to force the physical representation of the hardware system into an initialized state.

5. The computer program product of claim 1 , further comprising computer-readable program code configured to, before converting the recorded values into the plurality of register commands, filter the recorded values to select only a portion of the recorded values based on whether the recorded values are used to force the hardware system into the desired state.

6. The computer program product of claim 1 , wherein the physical representation of the hardware system is at least one of: a FPGA configured to model at least a portion of the hardware system and an ASIC of the hardware system.

7. The computer program product of claim 1 , wherein the plurality of register commands in the script is programmatically generated without input from a user.

8. A system, comprising:

a computer processor; and

a memory containing a program that, when executed on the computer processor, performs an operation for testing a design of a hardware system, comprising:

executing firmware in a firmware testing tool, the firmware testing tool comprising a simulated model of the hardware system, wherein, while executing the firmware, the firmware testing tool writes data to registers in the simulated model that force the simulated model into a desired state;

recording values written to the registers while executing the firmware; and

converting the recorded values into a plurality of register commands to generate a script, wherein the script is configured to, when executed on a testing apparatus, force a physical representation of the hardware system into the desired state.

9. The system of claim 8 , the operation further comprising, upon determining that the script does not force the physical representation of the hardware system into the desired state:

executing updated firmware in the firmware testing tool;

recording new values written to the registers while executing the updated firmware; and

converting the new values into a different plurality of register commands to generate a new script.

10. The system of claim 8 , wherein the script is configured to be used by the testing apparatus to write values to registers in the physical representation of the hardware system.

11. The system of claim 8 , wherein the plurality of register commands in the script is arranged in a sequence configured to force the physical representation of the hardware system into an initialized state.

12. The system of claim 8 , the operation further comprising, before converting the recorded values into the plurality of register commands, filtering the recorded values to select only a portion of the recorded values based on whether the recorded values are used to force the hardware system into the desired state.

13. The system of claim 8 , wherein the physical representation of the hardware system is at least one of: a FPGA configured to model at least a portion of the hardware system and an ASIC of the hardware system.

14. The system of claim 8 , wherein the plurality of register commands in the script is programmatically generated without input from a user.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2019
From: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE LTD.
To: LENOVO INTERNATIONAL LIMITED
Reel/Frame 050304/0277 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNMENT DOCUMENT CONTAINING TYPO ERRORS PREVIOUSLY RECORDED AT REEL: 037101 FRAME: 0969. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 28, 2015
From: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
To: LENOVO INTERNATIONAL LIMITED
Reel/Frame 037689/0190 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 12, 2015
From: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
To: LENOVO INTERNATIONAL LIMITED
Reel/Frame 037101/0969 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
Reel/Frame 034194/0353 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2012
From: ENGEBRETSEN, DAVID R.; KNIGHT, STEPHEN A.; SALEY, JAIMESON; WILE, BRUCE
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 029492/0404 →