IP Library Granted Patent US 8,995,912
Granted Patent B2
US 8,995,912 · App. 13/725,051 · Granted Mar 31, 2015

Transmission line for an integrated circuit package

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Quick Facts
Patent No.
US 8,995,912
App. No.
13/725,051
Granted
Mar 31, 2015
Kind
B2
Abstract

Communication between chips is provided using a transmission line. Any one of the chips may tap into the transmission line, and communicate with another chip tapped into the transmission line by transmitting a radio frequency (RF) signal to the other chip via the transmission line or receiving an RF signal from the other chip via the transmission line. The transmission line may include a microstrip transmission line, a waveguide, a stripline transmission line, or another type of transmission line. The chips may use the transmission line to communicate data, control and/or clock signals with one another.

Claims (49)

1. An integrated chip (IC) package, comprising:

a transmission line;

a first chip including a first radio frequency (RF) transceiver coupled to the transmission line at a first position; and

a second chip including a second RF transceiver coupled to the transmission line at a second position;

wherein the first and second RF transceivers are configured to communicate with one another by transmitting and receiving RF signals on the transmission line; and

wherein the first RF transceiver is configured to transmit a first RF signal having a first frequency to the second RF transceiver, and the first and second positions are spaced apart on the transmission line such that a standing wave is generated between the first and second positions when the first RF transceiver transmits the first RF signal, the standing wave forming an approximate short at the first position and an approximate open at the second position.

2. The IC package of claim 1 , wherein the transmission line comprises:

a conductor;

a ground plane; and

a dielectric layer between the conductor and the ground plane.

3. The IC package of claim 2 , wherein the conductor is substantially flat and runs substantially parallel to the ground plane.

4. The IC package of claim 2 , wherein the transmission line is integrated on a substrate, and the first chip and the second chip are mounted on the substrate.

5. The IC package of claim 1 , wherein the first chip comprises a controller, the first RF transceiver comprises a power amplifier having an adjustable output power, and the controller is configured to adjust the output power of the power amplifier based on at least one of a data rate of an RF signal to be transmitted to the second RF transceiver via the transmission line and an error rate at the second RF transceiver.

6. The IC package of claim 1 , wherein the first chip comprises a controller, the first RF transceiver comprises a modulator having an adjustable modulation scheme, and the controller is configured to adjust the modulation scheme of the modulator based on at least one of a data rate of an RF signal to be transmitted to the second RF transceiver via the transmission line, and an error rate at the second RF transceiver.

7. An integrated chip (IC) package, comprising:

a transmission line;

a first chip including a first radio frequency (RF) transceiver coupled to the transmission line at a first position;

a second chip including a second RF transceiver coupled to the transmission line at a second position; and

a third chip including a third RF transceiver coupled to the transmission line;

wherein the first, second and third RF transceivers are configured to communicate with one another by transmitting and receiving RF signals on the transmission line; and

wherein the first RF transceiver is configured to transmit a first RF signal having a first frequency to the second RF transceiver, and the first and second positions are spaced apart on the transmission line such that a standing wave is generated between the first and second positions when the first RF transceiver transmits the first RF signal, the standing wave forming an approximate short at the first position and an approximate open at the second position.

8. The IC package of claim 7 , wherein the first RF transceiver is configured to transmit the first RF signal having the first frequency to the second RF transceiver via the transmission line, and to transmit the second RF signal having a second frequency to the third RF transceiver via the transmission line.

9. The IC package of claim 7 , wherein the first RF transceiver is configured to transmit, during a first time slot, the first RF signal to the second RF transceiver via the transmission line, and to transmit, during a second time slot, a second RF signal to the third RF transceiver via the transmission line.

10. The IC package of claim 7 , wherein the first RF transceiver is configured to spread the first RF signal with a first code assigned to the second chip, to spread a second RF signal with a second code assigned to the third chip, and to transmit the first and second RF signals on the transmission line.

11. The IC package of claim 7 , wherein the first RF transceiver is configured to transmit the first RF signal and a second RF signal on the transmission line, the first RF signal including a first address assigned to the second chip and the second RF signal including a second address assigned to the third chip.

12. The IC package of claim 7 , wherein the transmission line comprises:

a conductor;

a ground plane; and

a dielectric layer between the conductor and the ground plane.

13. The IC package of claim 12 , wherein the conductor is substantially flat and runs substantially parallel to the ground plane.

14. The IC package of claim 12 , wherein the transmission line is integrated on a substrate, and the first, second and third chips are mounted on the substrate.

15. An integrated chip (IC) package, comprising:

a transmission line;

a first tap coupled to the transmission line at a first position on the transmission line;

a second tap coupled to the transmission line at a second position on the transmission line, the second position being spaced apart from the first position;

a first chip, wherein the chip comprises:

a first radio frequency (RF) transceiver;

a coupling switch configured to selectively couple the first RF transceiver to the first tap and the second tap; and

a controller configured to control the coupling switch; and

a second chip comprising a second RF transceiver coupled to the transmission line at a third position;

wherein the first RF transceiver is configured to transmit a first RF signal having a first frequency to the second RF transceiver, and the first and third positions are spaced apart on the transmission line such that a standing wave is generated between the first and third positions when the first RF transceiver transmits the first RF signal, the standing wave forming an approximate short at the first position and an approximate open at the third position.

16. The IC package of claim 15 , wherein the controller is configured to instruct the coupling switch to couple the RF transceiver to the first tap when the RF transceiver is to transmit the first RF signal having the first frequency on the transmission line, and to instruct the coupling switch to couple the RF transceiver to the second tap when the RF transceiver is to transmit a second RF signal having a second frequency on the transmission line.

17. The IC package of claim 15 , wherein the transmission line comprises:

a conductor;

a ground plane; and

a dielectric layer between the conductor and the ground plane.

18. The IC package of claim 17 , wherein the conductor is substantially flat and runs substantially parallel to the ground plane.

19. The IC package of claim 17 , wherein the first tap comprises a first interconnect bump between the first chip and the conductor of the transmission line, and the second tap comprises a second interconnect bump between the first chip and the conductor of the transmission line.

20. The IC package of claim 17 , wherein the transmission line is integrated on a substrate, and the first chip and the second chip are mounted on the substrate.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 2, 2013
From: ROFOUGARAN, AHMADREZA
To: BROADCOM CORPORATION
Reel/Frame 029557/0472 →