IP Library Granted Patent US 10,027,114
Granted Patent B2
US 10,027,114 · App. 13/732,167 · Granted Jul 17, 2018

Master slave architecture for distributed DC to AC power conversion

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,027,114
App. No.
13/732,167
Granted
Jul 17, 2018
Kind
B2
Abstract

A solar module device with the master circuit generates the timing signal to synchronize each of the synchronized half wave rectified DC waveform generated by each of the slave circuits to a grid AC signal or a reference AC signal to allow the DC-AC power conversion of a plurality of solar cell groups provided in a module in an on-grid application and an off-grid application.

Claims (32)

1. A distributed power converter for a solar module comprising:

a plurality of slave circuits, each of the slave circuits comprising:

an input comprising a DC input from a solar cell group;

a preliminary boost circuit coupled to the input, the preliminary boost circuit configured to boost an input voltage from the input from the solar cell group to an intermediary voltage;

a DC boost circuit coupled to the preliminary boost circuit and configured to boost the intermediary voltage to an AC RMS peak voltage;

a rectifier circuit coupled to the DC boost circuit and configured to wave shape the DC output to a half wave rectified DC waveform;

a rectifier energy recovery circuit configured to reduce a diode recovery loss in the rectifier circuit, the rectifier energy recovery circuit coupled to the rectifier circuit at a first node and a second node, the rectifier energy recovery circuit including a first diode, a second diode, a capacitor, and an inductor; and

an output coupled to the rectifier energy recovery circuit and a DC bus structure, the output comprising a third node and a fourth node, wherein the inductor has a first end connected to the first node and a second end connected to the third node, the first diode is connected to the capacitor at a fifth node, the first diode and the capacitor are connected between the first node and the second node, and the second diode has a first end

connected to the second end of the inductor and a second end connected to the fifth node;

a master circuit, the master circuit being coupled to each of the slave circuits via the DC bus structure, the master circuit being configured to generate a timing signal to synchronize each of the slave circuits to generate a synchronized half wave rectified DC waveform to output a resulting half wave rectified DC waveform having an amplitude characterized by a combination of each of the amplitudes from each of the slave circuits.

2. The device of claim 1 wherein each input comprises a first terminal and a second terminal.

3. The device of claim 1 wherein each of the preliminary boost circuits comprises an inductive storage coupled to a capacitive storage coupled within a boost circuit.

4. The device of claim 1 wherein each of the DC boost circuit comprises a phase shift full bridge boost circuit or an advanced boost circuit achieving Zero-Voltage-Switching (ZVS) or Zero-Current-Switching (ZCS) or both ZVS and ZCS.

5. The device of claim 1 wherein each of the rectifier circuits comprises a four diode bridge circuit.

6. The device of claim 1 wherein the input comprises a voltage of at least four (4) volts.

7. The device of claim 1 wherein the intermediary voltage ranges from about 15 volts to 20 volts.

8. The device of claim 1 wherein the half wave rectified DC waveform has a voltage ranging from about 160 volts to 350 volts.

9. The device of claim 1 wherein each of the half wave rectified DC waveforms is characterized by a substantially similar voltage to result in aggregated current waveform, the aggregated current waveform being substantially equal to a number of currents resulting from each of the half wave rectified DC waveforms, wherein the number is equal to a number of slave circuits in the plurality of slave circuits.

10. The device of claim 1 wherein each slave circuit is directly coupled to a solar cell group configured in a serial manner, such that output power is optimized from the solar cell group.

11. The device of claim 10 wherein each of the slave circuits provides a galvanic isolation between a DC source derived from each solar cell group and a combined AC supply which is either from a grid source or a reference AC signal generated by another device.

12. The device of claim 11 wherein each of the slave circuits is suspended with a common signal and prevented from performing an DC to AC inversion to enhance safety when connected to the grid source.

13. The device of claim 1 wherein the distributed power converter is provided on a backside of a substrate of the solar module and is substantially free from a junction box or power aggregator.

14. The device of claim 1 wherein the master circuit is configured to unfold a voltage and a current waveform on the DC bus structure.

15. A method of using a distributed power converter for a solar module comprising:

generating a DC output from a solar cell group of a plurality of solar cell groups provided in a module;

receiving the DC output at an input of a preliminary boost circuit coupled to the input;

boosting, using the preliminary boost circuit, an input voltage from the input from the solar cell group to an intermediary voltage, the preliminary boost circuit coupled to a DC boost circuit;

boosting, using the DC boost circuit, the intermediary voltage to an AC RMS peak voltage, the DC boost circuit being coupled to a rectifier circuit;

wave-shaping a DC output to a half wave rectified DC waveform using a rectifier circuit;

reducing a diode recovery loss in the rectifier circuit using a rectifier energy recovery circuit, the rectifier energy recovery circuit coupled to the rectifier circuit including a first diode, a second diode, a capacitor, and an inductor;

generating a timing signal from a master circuit to synchronize the half wave rectified DC waveform and to generate the synchronized half wave rectified DC waveform; and

combining the synchronized half wave rectified DC waveform with a plurality of other synchronized half wave rectified DC waveforms to output a resulting half wave rectified DC waveform having an amplitude characterized by a combination of each amplitude from each of synchronized half wave rectified DC waveforms.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2017
From: SUNEDISONMICROINVERTER PRODUCTS LLC
To: MPOWERSOLAR INC.
Reel/Frame 043343/0727 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2013
From: POTHARAJU, SURYANARAYANA; JAYARAMAN, VIJAY SHANKAR
To: MPOWERSOLAR INC.
Reel/Frame 029612/0949 →