IP Library Granted Patent US 8,659,003
Granted Patent B2
US 8,659,003 · App. 13/733,828 · Granted Feb 25, 2014

Disturb-resistant non-volatile memory device and method

Inventors: Scott Brad Herner (San Jose, CA); Hagop Nazarian (San Jose, CA)
Assignee: Crossbar, Inc.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,659,003
App. No.
13/733,828
Granted
Feb 25, 2014
Kind
B2
Abstract

A method of forming a disturb-resistant non volatile memory device. The method includes providing a semiconductor substrate having a surface region and forming a first dielectric material overlying the surface region. A first wiring material overlies the first dielectric material, a doped polysilicon material overlies the first wiring material, and an amorphous silicon switching material overlies the said polysilicon material. The switching material is subjected to a first patterning and etching process to separating a first strip of switching material from a second strip of switching spatially oriented in a first direction. The first strip of switching material, the second strip of switching material, the contact material, and the first wiring material are subjected to a second patterning and etching process to form at least a first switching element from the first strip of switching material and at least a second switching element from the second strip of switching material, and a first wiring structure comprising at least the first wiring material and the contact material. The first wiring structure being is in a second direction at an angle to the first direction.

Claims (8)

1. A non-volatile memory device structure, comprising:

a substrate having a surface region;

a first dielectric material overlying the surface region of the semiconductor substrate;

a first cell, the first cell comprising a first wiring structure extending in a first direction overlying the first dielectric material, a first contact region comprising a p+ polysilicon material, a first switching region comprising an amorphous silicon material, and a second wiring structure extending in a second direction orthogonal to the first direction;

a second cell, the second cell comprising the first wiring structure, a second contact region comprising the p+ polysilicon material, a second switching region comprising the amorphous silicon material, and a third wiring structure separated from the second wiring structure and parallel to the second wiring structure; and

a second dielectric material disposed at least in a region between the first switching region and the second switching region to electrically and physically isolate the first switching region and the second switching region.

2. The device of claim 1 wherein the first call and the second cell are provided in an N by M interconnected crossbar array.

3. The device of claim 1 wherein the second dielectric material is further disposed in a first region between the first contact region and the second contact region, and a second region between the second wiring structure and the third wiring structure.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2022
From: CROSSBAR, INC.
To: INNOSTAR SEMICONDUCTOR (SHANGHAI) CO., LTD.
Reel/Frame 059546/0927 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2013
From: HERNER, SCOTT BRAD; NAZARIAN, HAGOP
To: CROSSBAR, INC.
Reel/Frame 031401/0444 →
Continuity (2)
Division 12861666 · Aug 23, 2010
Related Publication 20130214241A1 · Aug 22, 2013