Gallium nitride devices with vias
View Patent ↗Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.
1. A transistor comprising a source electrode, a drain electrode and a gate electrode, said transistor further comprising:
a substrate;
a transition layer situated over said substrate;
a gallium nitride layer situated over said transition layer;
a via that extends through at least a portion of said substrate;
a barrier layer along sidewalls of said via;
an electrically conductive layer on a back surface of said substrate;
said via coupling said electrically conductive layer on said back surface of said substrate to a top-side contact formed over said substrate, said top-side contact overlying a conductive field plate extending over said source electrode.
2. The transistor of claim 1 , wherein said substrate comprises silicon.
3. The transistor of claim 1 , wherein said electrically conductive layer comprises aluminum.
4. The transistor of claim 1 , wherein said electrically conductive layer includes a first portion comprising gold and a second portion comprising aluminum.
5. The transistor of claim 1 further comprising a passivating layer situated over said gallium nitride layer.
6. The transistor of claim 1 , wherein said gate electrode is defined by an electrode-defining layer comprising silicon nitride.
7. The transistor of claim 1 , wherein said transition layer is compositionally-graded.
8. The transistor of claim 1 further comprising a silicon nitride layer between said substrate and said transition layer.
9. A transistor comprising a source electrode, a drain electrode and a gate electrode, said transistor further comprising:
a substrate;
a silicon nitride layer situated over said substrate;
a transition layer situated over said silicon nitride layer;
a gallium nitride layer situated over said transition layer;
a via that extends through at least a portion of said substrate;
a barrier layer along sidewalls of said via;
an electrically conductive layer on a back surface of said substrate;
said via coupling said electrically conductive layer on said back surface of said substrate to a top-side contact formed over said substrate, said top-side contact overlying a conductive field plate extending over said source electrode.
10. The transistor of claim 9 , wherein said substrate comprises silicon.
11. The transistor of claim 9 , wherein said electrically conductive layer comprises aluminum.
12. The transistor of claim 9 , wherein said electrically conductive layer includes a first portion comprising gold and a second portion comprising aluminum.
13. The transistor of claim 9 further comprising a passivating layer situated over said gallium nitride layer.
14. The transistor of claim 9 , wherein said gate electrode is defined by an electrode-defining layer comprising silicon nitride.
15. The transistor of claim 9 , wherein said transition layer is compositionally-graded.