IP Library Granted Patent US 9,137,148
Granted Patent B2
US 9,137,148 · App. 13/738,022 · Granted Sep 15, 2015

Information processing system and information processing apparatus

Inventor: Atsushi Masaki (Kawasaki, JP)
Assignee: FUJITSU LIMITED
H04L45/245Y02B60/33
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Quick Facts
Patent No.
US 9,137,148
App. No.
13/738,022
Granted
Sep 15, 2015
Kind
B2
Abstract

A control unit included in an information processing system determines, on the basis of information indicative of interface units and path information indicative of communication paths through a plurality of relay apparatus, whether or not the number of communication paths for access from the interface units to a node is greater than the number of the interface units. When the number of the communication paths is greater than the number of the interface units, the control unit controls the plurality of relay apparatus so as to block a part of the communication paths.

Claims (14)

1. An information processing system comprising:

a plurality of relay apparatus which relay communication between a first node and a second node; and

an information processing apparatus which acquires path information indicative of communication paths through the plurality of relay apparatus from at least one of the plurality of relay apparatus, which determines on the basis of information indicative of a plurality of interface units included in the first node and used for access from the first node to the second node and the path information whether or not a number of a plurality of communication paths through the plurality of relay apparatus for access from the plurality of interface units to the second node is greater than a number of the plurality of interface units and which controls, depending on a determination result, at the time of the number of the plurality of communication paths being greater than the number of the plurality of interface units, the plurality of relay apparatus so as to block a part of the plurality of communication paths and at the time of the number of the plurality of communication paths being less than or equal to the number of the plurality of interface units, the plurality of relay apparatus so as to keep the plurality of communication paths open.

2. The information processing system according to claim 1 , wherein the information processing apparatus blocks a part of the plurality of communication paths by disconnecting power from a relay apparatus on the plurality of communication paths or by making the relay apparatus stop supply of power to a part of communication ports included in the relay apparatus.

3. The information processing system according to claim 1 , wherein when, by blocking a communication path of the plurality of communication paths shared by two or more interface units, a communication path for access from one of the two or more interface units to the second node is lost, the information processing apparatus does not block the communication path shared by the two or more interface units.

4. The information processing system according to claim 1 , wherein the information processing apparatus blocks a part of the plurality of communication paths so that a number of communication paths of the plurality of communication paths which are blocked does not exceed a difference between the number of the plurality of communication paths and the number of the plurality of interface units.

5. The information processing system according to claim 1 , wherein the information processing apparatus acquires the information indicative of the plurality of interface units from the first node.

6. An information processing apparatus used for controlling a system including a plurality of relay apparatus which relay communication between a first node and a second node, the information processing apparatus comprising:

a memory which stores information indicative of a plurality of interface units included in the first node and used for access from the first node to the second node and path information indicative of communication paths through the plurality of relay apparatus; and

a processor which acquires the path information from at least one of the plurality of relay apparatus, which determines, on the basis of the information stored in the memory, whether or not a number of a plurality of communication paths through the plurality of relay apparatus for access from the plurality of interface units to the second node is greater than a number of the plurality of interface units and which controls, depending on a determination result, at the time of the number of the plurality of communication paths being greater than the number of the plurality of interface units, the plurality of relay apparatus so as to block a part of the plurality of communication paths and at the time of the number of the plurality of communication paths being less than or equal to the number of the plurality of interface units, the plurality of relay apparatus so as to keep the plurality of communication paths open.

7. A non-transitory computer-readable storage medium storing a program used for controlling a system including a plurality of relay apparatus which relay communication between a first node and a second node, the program causing a computer to perform a procedure comprising:

acquiring path information indicative of communication paths through the plurality of relay apparatus from at least one of the plurality of relay apparatus;

determining, on the basis of information indicative of a plurality of interface units included in the first node and used for access from the first node to the second node and the path information, whether or not a number of a plurality of communication paths through the plurality of relay apparatus for access from the plurality of interface units to the second node is greater than a number of the plurality of interface units; and

controlling, depending on a determination result, at the time of the number of the plurality of communication paths being greater than the number of the plurality of interface units, the plurality of relay apparatus so as to block a part of the plurality of communication paths and at the time of the number of the plurality of communication paths being less than or equal to the number of the plurality of interface units, the plurality of relay apparatus so as to keep the plurality of communication paths open.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ORIGINAL COVER SHEET BY REMOVING PATENT NUMBER 10586039 PREVIOUSLY RECORDED ON REEL 69272 FRAME 546. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 1, 2025
From: FUJITSU LIMITED
To: FSAS TECHNOLOGIES INC.
Reel/Frame 070764/0091 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2024
From: FUJITSU LIMITED
To: FSAS TECHNOLOGIES INC.
Reel/Frame 069272/0546 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2013
From: MASAKI, ATSUSHI
To: FUJITSU LIMITED
Reel/Frame 029666/0723 →
Priority Claims (1)
JP 2012-020624 · Feb 2, 2012 · national
Continuity (1)
Related Publication 20130201992A1 · Aug 8, 2013