Image sensor and method for fabricating the same

1. A method comprising:

forming a gate on a semiconductor substrate;

on an upper portion of the semiconductor substrate, forming spacers on both side walls of the gate and forming a dummy pattern spaced apart from the gate;

forming a metal pad configured to provide an electrical connection on an upper portion of the dummy pattern;

forming an interlayer dielectric layer at least one of on and over the entire semiconductor substrate and the metal pad;

etching portions of the interlayer dielectric layer and the semiconductor substrate to form a super-contact hole;

forming an insulation film on the entire surface of the interlayer dielectric layer and the super-contact hole;

forming normal contact holes exposing at least a portion of an upper portion of the gate and at least a partial portion of the metal pad; and

filling the normal contact holes with a conductive material to form normal contacts.

2. The method of claim 1 , wherein the method is a method of fabricating an image sensor.

3. The method of claim 1 , wherein the semiconductor substrate is an epitaxial layer.

4. The method of claim 1 , wherein the metal pad covers at least a portion of the upper portion of the dummy pattern.

5. The method of claim 1 , wherein the metal pad covers the entire upper portion of the dummy pattern.

6. The method of claim 1 , wherein said forming a dummy pattern comprises:

forming an oxide film over an upper portion of the semiconductor substrate having the gate formed thereon; and

patterning a portion of the oxide film to form the spacers and the dummy pattern spaced apart from the gate on an upper portion of the semiconductor substrate.

7. The method of claim 1 , wherein said forming a metal pad comprises:

depositing a metal material on the entire surface of the semiconductor substrate with the dummy pattern formed thereon; and

patterning the deposited metal material to form the metal pad covering a partial region of an upper portion of the dummy pattern and a partial upper portion of the semiconductor substrate adjacent to the dummy pattern.

8. The method of claim 1 , wherein the insulation film is formed by using a silicon nitride film or a silicon oxide film.

9. An apparatus comprising:

a gate formed on a semiconductor substrate and spacers formed on both side walls of the gate;

a dummy pattern formed spaced apart from the gate on an upper portion of the semiconductor substrate;

a metal pad covering an upper portion of dummy pattern, wherein the metal pad is configured for electrical connection;

an interlayer dielectric layer covering the entire semiconductor substrate having the gate and the metal pad for an electrical connection formed thereon;

normal contacts formed to be connected to a portion of an upper portion of the gate and a partial region of the metal pad for an electrical connection; and

a super-contact formed by etching portions of the interlayer dielectric layer and the semiconductor substrate.

10. The apparatus of claim 9 , wherein the apparatus is an image sensor.

11. The apparatus of claim 9 , wherein the dummy pattern is formed by patterning a portion of an oxide film deposited to form the spacers.

12. The apparatus of claim 9 , wherein the metal pad is formed to have a structure that covers a portion of an upper portion of the dummy pattern and a partial upper portion of the semiconductor substrate adjacent to the dummy pattern.

13. The apparatus of claim 9 , wherein the metal pad covers the entire upper portion of the dummy pattern.

14. The apparatus of claim 9 , wherein the metal pad covers a portion of the upper portion of the dummy pattern.