Microbump and sacrificial pad pattern
View Patent ↗Embodiments described herein generally relate to connections for integrated circuit (IC) dies. For example, in an embodiment an integrated circuit (IC) die is provided. The IC die includes a plurality of clusters of pads formed on a surface of the IC die, each cluster being associated with a respective circuit formed in the IC die. Each cluster includes a plurality of micropads each electrically coupled to the circuit associated with the cluster through a respective via and a sacrificial pad coupled to the circuit through the plurality of micropads, the sacrificial pad being larger than each of the micropads.
1. An integrated circuit (IC) die, comprising:
a plurality of clusters of pads formed on a surface of the IC die, wherein each cluster is associated with a respective circuit formed in the IC die and wherein each cluster comprises:
a plurality of micropads each electrically coupled to the circuit associated with the cluster through a respective via; and
a sacrificial pad coupled to the circuit through the plurality of micropads, the sacrificial pad being larger than each of the micropads.
2. The IC die of claim 1 , wherein each micropad is configured to be physically and electrically connected to a respective microbump.
3. The IC die of claim 1 , wherein, for each cluster, each micropad is electrically coupled to the sacrificial pad through a respective trace formed on the surface of the IC die.
4. The IC die of claim 1 , further comprising:
a trace located between first and second adjacent clusters of the plurality of clusters.
5. The IC die of claim 1 , wherein, for each cluster, each micropad of the plurality of micropads is substantially equidistant from a center of the sacrificial pad.
6. The IC die of claim 5 , wherein at least one plurality of micropads of the plurality of micropads comprises at least three micropads.
7. The IC die of claim 6 , wherein the plurality of clusters of pads comprises first, second, and third clusters, wherein the second and third clusters are adjacent to the first cluster and wherein a distance between the first and second clusters is larger than a distance between the first and third clusters.
8. The IC die of claim 1 , wherein each plurality of micropads comprises first and second micropads and wherein each of the clusters comprises a trace that interconnects the first and second micropads of the plurality of micropads.
9. The IC die of claim 8 , wherein the trace is formed in a first direction.
10. The IC die of claim 9 , wherein each plurality of micropads further comprises third and fourth micropads, wherein each of the clusters further comprises a second trace that interconnects the third and fourth micropads, and wherein the second trace is formed in a second direction that is perpendicular to the first direction.
11. The IC die of claim 8 , wherein an outer surface of the first micropad substantially coincides with an outer surface of the sacrificial pad in a second direction and wherein the second direction is perpendicular to a first direction.
12. The IC die of claim 8 , wherein the plurality of clusters comprises first, second, and third clusters, wherein the second and third clusters are adjacent to the first cluster and wherein a distance between the first and second clusters is larger than a distance between the first and third clusters.
13. The IC die of claim 8 , wherein each plurality of micropads further comprises a third micropad and wherein the first and third micropads of each plurality of micropads are substantially equidistant from a center of a respective sacrificial pad.
14. The IC die of claim 1 , wherein the sacrificial pad is sized to be coupled to a C4 bump.
15. A method of manufacturing an integrated circuit (IC) die, comprising:
forming a plurality of circuits in a substrate; and
forming a plurality of clusters on a surface of the substrate, each cluster comprising:
a plurality of micropads each electrically coupled through a respective via to a circuit respective to the cluster; and
a sacrificial pad coupled to the circuit through the plurality of micropads, the sacrificial pad being larger than each of the micropads.
16. The method of claim 15 , further comprising:
forming a trace between first and second adjacent clusters of the plurality of clusters.
17. The method of claim 16 , wherein forming the trace comprises: forming the trace in a first direction.
18. The method of claim 15 , wherein forming the plurality of clusters comprises:
forming at least three micropads in each cluster.
19. The method of claim 17 , wherein forming the plurality of clusters comprises:
forming first, second, and third clusters such that the second and third clusters are adjacent to the first cluster and a distance between the first and second clusters is larger than a distance between the first and third clusters.
20. The method of claim 15 , wherein forming the plurality of clusters comprises:
for each cluster, forming first and second micropads; and
for each cluster, forming a trace that interconnects the first and second micropads of the plurality of micropads.