IP Library Granted Patent US 9,142,706
Granted Patent B2
US 9,142,706 · App. 13/743,417 · Granted Sep 22, 2015

Method of manufacturing solar cell

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,142,706
App. No.
13/743,417
Granted
Sep 22, 2015
Kind
B2
Abstract

A second semiconductor layer is formed to cover a first principle surface of a semiconductor substrate including a insulating layer formed on the first principle surface. A portion of the second semiconductor layer formed on the insulating layer is partially removed by etching using a first etchant whose etching rate is higher for the second semiconductor layer than for the insulating layer. A portion of the insulating layer is removed by etching, through the removed portion of the second semiconductor layer, using a second etchant whose etching rate for the insulating layer is higher than that for the second semiconductor layer, thereby exposing apart of the first semiconductor layer. Electrodes are formed on the exposed part of the first semiconductor layer and the second semiconductor layer, respectively.

Claims (27)

1. A method of manufacturing a solar cell, comprising:

preparing a semiconductor substrate having first and second principle surfaces,

forming a first amorphous semiconductor layer having a first conductivity on a portion of the first principle surface,

forming an insulating layer of silicon nitride, silicon oxide or silicon oxynitride covering the first amorphous semiconductor layer;

then forming a second amorphous semiconductor layer having a second conductivity to cover the first principle surface including a surface of the insulating layer;

partially removing a portion of the second semiconductor layer located on the insulating layer by etching using a first etchant whose etching rate is higher for the second semiconductor layer than for the insulating layer;

exposing the first amorphous semiconductor layer by removing a portion of the insulating layer by etching using the second semiconductor layer partially removed by the etching as a mask and using a second etchant whose etching rate is higher for the insulating layer than for the second semiconductor layer; and after exposing the first amorphous semiconductor layer,

then forming an electrode on each of the first semiconductor layer and the second semiconductor layer.

2. The method of manufacturing a solar cell according to claim 1 , wherein a semiconductor substrate having the first conductivity is used as the semiconductor substrate.

3. The method of manufacturing a solar cell according to claim 1 , wherein a crystalline semiconductor substrate is used as the semiconductor substrate.

4. The method of manufacturing a solar cell according to claim 1 , wherein the second semiconductor layer is formed to cover substantially the entire of the first principle surface of the semiconductor substrate with the first semiconductor layer and the second semiconductor layer.

5. The method of manufacturing a solar cell according to claim 1 , wherein the insulating layer contains hydrogen.

6. The method of manufacturing a solar cell according to claim 1 , wherein an alkaline etching solution is used as the first etchant and an acid etching solution is used as the second etchant.

7. The method of manufacturing a solar cell according to claim 6 , wherein at least one of NaOH aqueous solution and KOH aqueous solution is used as the first etchant and HF aqueous solution is used as the second etchant.

8. The method of manufacturing a solar cell according to claim 1 , wherein the electrode forming step comprises:

forming a first conductive layer on the first semiconductor layer, the second semiconductor layer, and the insulating layer;

insulating a portion of the first conductive layer formed on the first semiconductor layer and a portion of the first conductive layer formed on the second semiconductor layer from each other by dividing the first conductive layer at a portion located on the insulating layer; and after exposing the first amorphous semiconductor laver,

then forming a first electrode electrically connected with the first semiconductor layer and a second electrode electrically connected with the second semiconductor layer by forming a second conductive layer on each of the portion of the first conductive layer formed on the first semiconductor layer and the portion of the first conductive layer formed on the second semiconductor layer.

9. A method of manufacturing a solar cell, comprising:

preparing a semiconductor substrate having first and second principle surfaces,

forming a first amorphous semiconductor layer having a first conductivity on a portion of the first principle surface,

forming an insulating layer of silicon nitride, silicon oxide or silicon oxynitride

covering the first amorphous semiconductor layer;

then forming a second amorphous semiconductor layer having a second conductivity to cover the first principle surface including a surface of the insulating layer;

partially removing a portion of the second semiconductor layer located on the insulating layer;

exposing the first amorphous semiconductor layer by removing a portion of the insulating layer by etching using the second semiconductor layer partially removed by the etching as a mask and using a second etchant whose etching rate is higher for the insulating layer than for the second semiconductor layer; and after exposing the first amorphous semiconductor layer,

then forming an electrode on each of the first semiconductor layer and the second semiconductor layer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: SANYO ELECTRIC CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 035071/0276 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 035071/0508 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2013
From: MISHIMA, TAKAHIRO
To: SANYO ELECTRIC CO., LTD.
Reel/Frame 029646/0473 →