Method of fabricating vertically aligned group III-V nanowires
View Patent ↗A top-down method of fabricating vertically aligned Group III-V micro- and nanowires uses a two-step etch process that adds a selective anisotropic wet etch after an initial plasma etch to remove the dry etch damage while enabling micro/nanowires with straight and smooth faceted sidewalls and controllable diameters independent of pitch. The method enables the fabrication of nanowire lasers, LEDs, and solar cells.
1. A method of fabricating vertically aligned Group III-nitride nanowires, comprising:
providing a c-plane Group III-nitride substrate, or at least one c-plane Group III-nitride layer on a growth substrate;
coating the top surface of the c-plane Group III-nitride substrate or the at least one c-plane Group III-nitride layer with an etch mask;
anisotropically etching the c-plane Group III-nitride substrate or the at least one c-plane Group III-nitride layer through the etch mask to provide an array of c-axis oriented nanowires; and
selectively wet etching the sidewalls of the c-axis oriented nanowires to remove anisotropic etch damage and provide an array of vertically aligned Group III-nitride nanowires.
2. The method of claim 1 , wherein the growth substrate comprises sapphire, silicon, germanium, copper, silicon carbide, GaN, AlN, ZnO, or GaAs.
3. The method of claim 1 , wherein the etch mask comprises a hexagonally close-packed silica colloid monolayer or a lithographically patterned dielectric or metal layer.
4. The method of claim 1 , wherein the at least one c-plane Group-III nitride layer comprises c-plane GaN, AlN, AlGaN, InN, InGaN, AlInN, or AlInGaN that is undoped, n-type doped, or p-type doped.
5. The method of claim 1 , wherein the cross-sectional dimension of the vertically aligned Group III-nitride nanowires is less than 100 microns.
6. The method of claim 5 , wherein the cross-sectional dimension of the vertically aligned Group III-nitride nanowires is less than 1 micron.
7. The method of claim 1 , wherein the at least one c-plane Group III-nitride layer comprises a planar heterostructure.
8. A method of fabricating vertically aligned Group III-nitride nanowires, comprising:
providing at least one Group III-nitride layer on a growth substrate;
coating the top surface of the at least one Group III-nitride layer with an etch mask;
anisotropically etching the at least one Group III-nitride layer through the etch mask to provide an array of nanowires; and
selectively wet etching the sidewalls of the nanowires to remove anisotropic etch damage and provide an array of vertically aligned Group III-nitride nanowires;
wherein the at least one Group III-nitride layer comprises a planar heterostructure and wherein the planar heterostructure comprises a light-emitting diode, solar cell or laser structure.
9. The method of claim 8 , wherein the planar heterostructure comprises a base n-type layer, a planar multiple quantum well structure on the base n-type layer, and a top p-type layer on the multiple quantum well structure.
10. The method of claim 9 , wherein the base n-type layer comprises n-type GaN and the top p-type layer comprises p-type GaN or p-type InGaN.
11. The method of claim 10 , further comprising an InGaN underlayer between the base n-type GaN layer and the multiple quantum well structure.
12. The method of claim 8 , wherein the planar heterostructure comprises a base p-type layer, a planar multiple quantum well structure on the base p-type layer, and a top n-type layer on the multiple quantum well structure.
13. The method of claim 12 , wherein the base p-type layer comprises p-type GaN and the top n-type layer comprises n-type GaN or n-type InGaN.
14. The method of claim 13 , further comprising an InGaN underlayer between the base p-type GaN layer and the multiple quantum well structure.
15. The method of claim 9 or 12 , wherein the multiple quantum well structure comprises a GaN/InGaN- or GaN/AlGaN-based multiple quantum well structure.
16. The method of claim 1 , further comprising laterally growing a shell layer comprising at least one Group III-nitride layer coaxially around each of the vertically aligned Group III-nitride nanowires to provide an array of hybrid core-shell structures.
17. The method of claim 16 , wherein the shell layer comprises a radially grown light emitting diode, solar cell or laser structure.
18. The method of claim 16 , wherein the shell layer comprises a coaxial Group III-nitride multiple quantum well structure.
19. The method of claim 18 , further comprising growing a top layer on the shell layer.
20. The method of claim 19 , wherein the top layer coalesces on the top to form a continuous canopy layer that electrically connects the tops and sides of the vertically aligned Group III-nitride nanowires.
21. The method of claim 19 , wherein the vertically aligned Group III-nitride nanowires are n-type and the top layer is p-type.
22. The method of claim 21 , wherein the vertically aligned Group III-nitride nanowires comprise n-type GaN nanowires.
23. The method of claim 21 , wherein the shell layer comprises a GaN/InGaN- or GaN/AlGaN-based multiple quantum well structure.
24. The method of claim 21 , wherein the top layer comprises p-type InGaN.
25. The method of claim 23 , further comprising an InGaN underlayer between the n-type GaN nanowire and the GaN/InGaN- or GaN/AlGaN-based multiple quantum well structure.
26. The method of claim 7 , wherein the planar heterostructure comprises a light-emitting diode, solar cell, or laser structure.
27. The method of claim 26 , wherein the planar heterostructure comprises a base n-type layer, a planar multiple quantum well structure on the base n-type layer, and a top p-type layer on the multiple quantum well structure.
28. The method of claim 27 , wherein the base n-type layer comprises n-type GaN and the top p-type layer comprises p-type GaN or p-type InGaN.
29. The method of claim 28 , further comprising an InGaN underlayer between the base n-type GaN layer and the multiple quantum well structure.
30. The method of claim 26 , wherein the planar heterostructure comprises a base p-type layer, a planar multiple quantum well structure on the base p-type layer, and a top n-type layer on the multiple quantum well structure.
31. The method of claim 30 , wherein the base p-type layer comprises p-type GaN and the top n-type layer comprises n-type GaN or n-type InGaN.
32. The method of claim 31 , further comprising an InGaN underlayer between the base p-type GaN layer and the multiple quantum well structure.
33. The method of claim 28 , wherein the multiple quantum well structure comprises a GaN/InGaN- or GaN/AlGaN-based multiple quantum well structure.
34. The method of claim 30 , wherein the multiple quantum well structure comprises a GaN/InGaN- or GaN/AlGaN-based multiple quantum well structure.