IP Library Granted Patent US 9,054,197
Granted Patent B2
US 9,054,197 · App. 13/746,562 · Granted Jun 9, 2015

Thin-film transistor, display unit, and electronic apparatus

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Quick Facts
Patent No.
US 9,054,197
App. No.
13/746,562
Granted
Jun 9, 2015
Kind
B2
Abstract

A thin-film transistor includes: a gate electrode; a gate insulating film disposed on the gate electrode; an oxide semiconductor layer disposed on the gate insulating film and having a channel region located to face the gate electrode; a channel protective layer disposed on the gate insulating film and the oxide semiconductor layer; and source and drain electrodes each connected to the oxide semiconductor layer through a connection hole formed in the channel protective layer, in which the oxide semiconductor layer has, in a part of the channel region, a narrow region with a narrower width than a width of the connection hole.

Claims (33)

1. A thin-film transistor comprising:

a gate electrode;

a gate insulating film disposed on the gate electrode;

an oxide semiconductor layer disposed on the gate insulating film and having a channel region located to face the gate electrode;

a channel protective layer disposed on the gate insulating film and the oxide semiconductor layer; and

source and drain electrodes each connected to the oxide semiconductor layer through a connection hole formed in the channel protective layer,

wherein the oxide semiconductor layer has, in a part of the channel region disposed on the gate insulating film, a narrow region with a narrower width than a width of the connection hole and the oxide semiconductor layer has, in the part of the channel region, a narrow region with a narrower width than a width of the gate electrode.

2. The thin-film transistor according to claim 1 , wherein the oxide semiconductor layer has a protruding portion protruding from the source and drain electrodes at one or more corners or one or more sides of a wide region which is a region other than the narrow region.

3. The thin-film transistor according to claim 2 , wherein the protruding portion is disposed on each of four corners, which surround the narrow region, of the wide region.

4. The thin-film transistor according to claim 2 , wherein the protruding portion is disposed on one or both of sides, which face each other in a channel width direction, of the wide region.

5. The thin-film transistor according to claim 1 , wherein the oxide semiconductor layer has, in a part of the connection hole, an exposed portion exposed from the channel protective layer and the source and drain electrodes.

6. A display unit including a display device and a thin-film transistor driving the display device, the thin-film transistor comprising:

a gate electrode;

a gate insulating film disposed on the gate electrode;

an oxide semiconductor layer disposed on the gate insulating film and having a channel region located to face the gate electrode;

a channel protective layer disposed on the gate insulating film and the oxide semiconductor layer; and

source and drain electrodes each connected to the oxide semiconductor layer through a connection hole formed in the channel protective layer,

wherein the oxide semiconductor layer has, in a part of the channel region disposed on the gate insulating film, a narrow region with a narrower width than a width of the connection hole and the oxide semiconductor layer has, in the part of the channel region, a narrow region with a narrower width than a width of the gate electrode.

7. An electronic apparatus with a display unit including a display device and a thin-film transistor driving the display device, the thin-film transistor comprising:

a gate electrode;

a gate insulating film disposed on the gate electrode;

an oxide semiconductor layer disposed on the gate insulating film and having a channel region located to face the gate electrode;

a channel protective layer disposed on the gate insulating film and the oxide semiconductor layer; and

source and drain electrodes each connected to the oxide semiconductor layer through a connection hole formed in the channel protective layer,

wherein the oxide semiconductor layer has, in a part of the channel region disposed on the gate insulating film, a narrow region with a narrower width than a width of the connection hole and the oxide semiconductor layer has, in the part of the channel region, a narrow region with a narrower width than a width of the gate electrode.

8. The thin-film transistor according to claim 6 , wherein the oxide semiconductor layer has a protruding portion protruding from the source and drain electrodes at one or more corners or one or more sides of a wide region which is a region other than the narrow region.

9. The thin-film transistor according to claim 8 , wherein the protruding portion is disposed on each of four corners, which surround the narrow region, of the wide region.

10. The thin-film transistor according to claim 8 , wherein the protruding portion is disposed on one or both of sides, which face each other in a channel width direction, of the wide region.

11. The thin-film transistor according to claim 6 , wherein the oxide semiconductor layer has, in a part of the connection hole, an exposed portion exposed from the channel protective layer and the source and drain electrodes.

12. The thin-film transistor according to claim 7 , wherein the oxide semiconductor layer has a protruding portion protruding from the source and drain electrodes at one or more corners or one or more sides of a wide region which is a region other than the narrow region.

13. The thin-film transistor according to claim 12 , wherein the protruding portion is disposed on each of four corners, which surround the narrow region, of the wide region.

14. The thin-film transistor according to claim 12 , wherein the protruding portion is disposed on one or both of sides, which face each other in a channel width direction, of the wide region.

15. The thin-film transistor according to claim 7 , wherein the oxide semiconductor layer has, in a part of the connection hole, an exposed portion exposed from the channel protective layer and the source and drain electrodes.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 18, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 035657/0115 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2013
From: TOKUNAGA, KAZUHIKO; ARAI, TOSHIAKI
To: SONY CORPORATION
Reel/Frame 029670/0533 →