IP Library Granted Patent US 9,018,073
Granted Patent B2
US 9,018,073 · App. 13/749,019 · Granted Apr 28, 2015

Method of manufacturing a semiconductor device including alignment mark

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Quick Facts
Patent No.
US 9,018,073
App. No.
13/749,019
Granted
Apr 28, 2015
Kind
B2
Abstract

A method of manufacturing a semiconductor device includes: forming a recessed portion in a semiconductor substrate; forming an insulating film in the recessed portion; after forming the insulating film, forming a silicide layer on the semiconductor substrate in contact with the insulating film; and performing alignment between an electron beam exposure apparatus and the semiconductor substrate by using the insulating film and the silicide layer as an alignment mark.

Claims (30)

1. A method of manufacturing a semiconductor device, the method comprising:

forming a first recessed portion in a first region between a plurality of chip regions on a semiconductor substrate;

forming a first insulating film in the first recessed portion;

after forming the first insulating film, forming a first silicide layer directly on the semiconductor substrate in the first region, the first silicide layer being in contact with the first insulating film; and

performing alignment between an electron beam exposure apparatus and the semiconductor substrate by using the first insulating film and the first silicide layer as an alignment mark, wherein

the forming the first silicide layer includes:

forming a metal film over the semiconductor substrate and the first insulating film; and

forming the first silicide layer directly on the semiconductor substrate by heating the metal film; and

removing the metal film on the first insulating film, and

the performing alignment between the electron beam exposure apparatus and the semiconductor substrate is performed in such a way that the electron beam exposure apparatus scans an electron beam over the alignment mark and thereby detects a boundary where the first silicide layer is in contact with the first insulating film.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein the first region is a scribe region.

3. The method of manufacturing a semiconductor device according to claim 1 , the method further comprising:

forming a gate insulating film on a surface of the semiconductor substrate in each of the chip regions; and

forming a gate electrode over the gate insulating film, wherein

in the heating the metal film, a second silicide layer is formed over the gate electrode, and a third silicide layer is formed on the semiconductor substrate at both side of the gate electrode.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein

in the forming the first recessed portion, a second recessed portion is formed in each of the chip regions of the semiconductor substrate, and

in the forming the first insulating film, a second insulating film is formed also in the second recessed portion.

5. The method of manufacturing a semiconductor device according to claim 1 , the method further comprising:

forming a film over the semiconductor substrate;

forming a resist film over the film;

exposing the resist film by using the electron beam exposure apparatus after the performing alignment between the electron beam exposure apparatus and the semiconductor substrate;

forming a resist pattern by developing the resist film after the exposure; and

forming a device pattern in the film by etching the film with the resist pattern used as a mask.

6. The method of manufacturing a semiconductor device according to claim 1 , wherein

the first insulating film in the first recessed portion has a rectangular shape in a plan view, and

the first silicide layer has a rectangular shape surrounding the first insulating film in a plan view.

7. The method of manufacturing a semiconductor device according to claim 1 , wherein

the first recessed portion comprises a first part and a second part, and the first part has a shape turned 90° with respect to the second part in a plan view.

8. The method of manufacturing a semiconductor device according to claim 1 , wherein a top surface of the first silicide layer and a top surface of the first insulating film form a continuous single plane.

Assignments (2)
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2013
From: KAWANO, MAKOTO; YOSHIDA, SHIGEKI
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 029696/0720 →