IP Library Granted Patent US 9,008,191
Granted Patent B2
US 9,008,191 · App. 13/749,219 · Granted Apr 14, 2015

Video compression encoder

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Quick Facts
Patent No.
US 9,008,191
App. No.
13/749,219
Granted
Apr 14, 2015
Kind
B2
Abstract

A video compression encoder which does not require a video frame buffer is disclosed. Without a frame buffer, incoming pixels can not be compared to pixels previously sent to the decoder. Instead, the disclosed encoder only stores check values for groups of pixels sent. If a group's check value has not changed, the encoder sends a command to the decoder not to change that pixel group. Also, without a frame buffer, an incoming video frame can not be captured and later sent to the decoder as network throughput permits. Instead, if throughput is insufficient to send an encoded group of pixels, the encoder leaves the check value for that group unchanged and sends a command instructing the decoder not to change those pixels. This defers updating that group until the next screen update is sent to the decoder. Grouping of pixels can be done in any fashion, for example; a group can be a single video line, a portion of a line, multiple lines or screen rectangles containing portions of multiple lines.

Claims (30)

1. A method for encoding a video stream using copy encoding commands comprising the steps of:

specifying the amount of memory available to store video information;

for some number of copy encoding commands, determining the amount memory required to implement each type of copy encoding command, where the amount of memory required to implement a given type of copy command is dependant on the amount of memory required to represent a defined group of pixels and the number of respective groups thereof that need to be stored;

choosing which copy commands types to implement based on the specified amount of memory and the amount of memory required to implement each type of command.

2. A method for encoding video without a frame buffer that stores an entire frame of video, comprising the steps of:

receiving a first group of pixels from a first frame of video;

determining a first check value for the first group of pixels from the first frame of video;

receiving a second group of pixels from a second frame of video subsequent to the first frame of video;

determining a second check value for the second group of pixels from the second frame of video, wherein the second group of pixels corresponds to the same position in the second frame of video as the first group's position was in the first frame of video;

comparing the second check value to the first check value to determine if the first group of pixels and the second group of pixels are the same;

sending an encoding command to copy the first group of pixels if the first check value and the second check value are the same.

3. The method of claim 2 , further comprising encoding the second group of pixels if the first check value and the second check value are not the same.

4. The method of claim 3 , wherein the encoding includes sending encoding commands comprising one or more of: run length, copy left, copy above, makes-series and make-pixel.

5. The method of claim 2 , further comprising storing the first check value in a local buffer.

6. The method of claim 5 , further comprising replacing the first check value with the second check value in the local buffer if the first check value and the second check value are not the same.

7. The method of claim 6 , wherein the local buffer is not large enough to store an entire frame of video.

8. The method of claim 2 , wherein the first group of pixels is a line of the first frame of video.

9. A field programmable gate array (FPGA) for encoding video without a frame buffer that stores an entire frame of video, comprising:

line buffers configured to:

receive a first group of pixels from a frame of video; and

receive a second group of pixels from a second frame of video subsequent to the first frame of video; and

a local buffer configured to store a first check value for the first group of pixels from the first frame of video; and

wherein the FPGA determines a second check value for the second group of pixels from the second frame of video, wherein the second group of pixels corresponds to the same position in the second frame of video as the first group's position was in the first frame of video; and

a comparator configured to compare the second check value to the first check value to determine if the first group of pixels and the second group of pixels are the same; and

an encoder configured to send an encoding command to copy the first group of pixels if the first check value and the second check value are the same.

10. The FPGA of claim 9 , wherein the encoder encodes the second group of pixels if the first check value and the second check value are not the same.

11. The FPGA of claim 10 , wherein the encoding includes sending encoding commands comprising one or more of: run length, copy left, copy above, makes-series and make-pixel.

12. The FPGA of claim 9 , wherein the local buffer is configured to replace the first check value with the second check value in the local buffer if the first check value and the second check value are not the same.

13. The FPGA of claim 9 , wherein the local buffer is not large enough to store an entire frame of video.

14. The method of claim 9 , wherein the first group of pixels is a line of the first frame of video.

Assignments (9)
SECURITY INTEREST Recorded Oct 26, 2021
From: VERTIV CORPORATION; VERTIV IT SYSTEMS, INC.; ELECTRICAL RELIABILITY SERVICES, INC.; ENERGY LABS, INC.
To: UMB BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 057923/0782 →
SECURITY AGREEMENT Recorded Mar 3, 2020
From: ELECTRICAL RELIABILITY SERVICES, INC.; ENERGY LABS, INC.; VERTIV CORPORATION; VERTIV IT SYSTEMS, INC.
To: CITIBANK, N.A.
Reel/Frame 052076/0874 →
RELEASE OF SECURITY INTEREST Recorded Mar 2, 2020
From: JPMORGAN CHASE BANK, N.A.
To: VERTIV IT SYSTEMS, INC. (F/K/A AVOCENT CORPORATION); VERTIV IT SYSTEMS, INC. (F/K/A AVOCENT HUNTSVILLE, LLC); VERTIV IT SYSTEMS, INC. (F/K/A AVOCENT REDMOND CORP.); VERTIV CORPORATION (F/K/A EMERSON NETWORK POWER, ENERGY SYSTEMS, NORTH AMERICA, INC.); VERTIV CORPORATION (F/K/A LIEBERT CORPORATION); VERTIV IT SYSTEMS, INC. (F/K/A AVOCENT FREMONT, LLC)
Reel/Frame 052065/0757 →
RELEASE OF SECURITY INTEREST Recorded Mar 2, 2020
From: THE BANK OF NEW YORK MELLON TRUST COMPANY N.A.
To: VERTIV CORPORATION; VERTIV IT SYSTEMS, INC.; ELECTRICAL RELIABILITY SERVICES, INC.
Reel/Frame 052071/0913 →
SECOND LIEN SECURITY AGREEMENT Recorded Jun 10, 2019
From: VERTIV IT SYSTEMS, INC.; VERTIV CORPORATION; VERTIV NORTH AMERICA, INC.; ELECTRICAL RELIABILITY SERVICES, INC.; VERTIV ENERGY SYSTEMS, INC.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 049415/0262 →
CHANGE OF NAME Recorded Dec 11, 2018
From: AVOCENT CORPORATION
To: VERTIV IT SYSTEMS, INC.
Reel/Frame 047788/0620 →
ABL SECURITY AGREEMENT Recorded Mar 6, 2017
From: ASCO POWER TECHNOLOGIES, L.P.; AVOCENT CORPORATION; AVOCENT FREMONT, LLC; AVOCENT HUNTSVILLE, LLC; AVOCENT REDMOND CORP.; EMERSON NETWORK POWER, ENERGY SYSTEMS, NORTH AMERICA, INC.; LIEBERT CORPORATION; LIEBERT NORTH AMERICA, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 041941/0363 →
SECURITY AGREEMENT Recorded Mar 2, 2017
From: ASCO POWER TECHNOLOGIES, L.P.; AVOCENT CORPORATION; AVOCENT FREMONT, LLC; AVOCENT HUNTSVILLE, LLC; AVOCENT REDMOND CORP.; EMERSON NETWORK POWER, ENERGY SYSTEMS, NORTH AMERICA, INC.; LIEBERT CORPORATION; LIEBERT NORTH AMERICA, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 041944/0892 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2016
From: DAMBRACKAS, WILLIAM; COSTA, MARIO; GOODLEY, GEORGE RICHARD
To: AVOCENT CORPORATION
Reel/Frame 040599/0409 →