IP Library Granted Patent US 8,621,265
Granted Patent B2
US 8,621,265 · App. 13/753,444 · Granted Dec 31, 2013

Computing core application access utilizing dispersed storage

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Quick Facts
Patent No.
US 8,621,265
App. No.
13/753,444
Granted
Dec 31, 2013
Kind
B2
Abstract

A computing core includes a processing module, main memory, and a memory controller. The memory controller receives a request to store a data result from a processing module and determines whether to store the data result in an error encoded format. When the memory controller determines to store the data result in the error encoded format, it facilitates encoding the data result in accordance with a dispersed storage error coding function to produce one or more sets of encoded data slices. The memory controller then determines where to store the one or more sets of encoded data slices and provides the one or more sets of encoded data slices to one or more identified memories for storage.

Claims (65)

1. A method for execution by a computer core, the method comprises:

receiving a request to store a data result from a processing module;

determining whether to store the data result in an error encoded format;

when the data result is to be stored in the error encoded format:

facilitating encoding the data result in accordance with a dispersed storage error coding function to produce one or more sets of encoded data slices, wherein the facilitating includes:

buffering the data result;

when the processing module is available, sending the data result and encoding instructions to the processing module;

executing, by the processing module, the encoding instructions to error encode the data result to produce the one or more sets of encoded data slices; and

receiving the one or more sets of encoded data slices from the processing module;

determining where to store the one or more sets of encoded data slices; and

providing the one or more sets of encoded data slices to one or more identified memories for storage.

2. The method of claim 1 , wherein the determining whether to store the data result in an error encoded format comprises:

accessing a memory map to determine that the data result is to be stored in the error encoded format.

3. The method of claim 1 , wherein the determining where to store the one or more sets of encoded data slices comprises:

accessing a memory map to determine the one or more identified memories.

4. The method of claim 1 further comprises:

when the data result is to be stored in a non-error encoded format:

determining where to store the data result; and

providing the data result to an identified memory for storage.

5. The method of claim 1 , wherein the data result comprises one of:

a data result from executing one or more operating system instructions:

a data result from executing one or more application instructions: and

a data result from executing one or more software driver instructions.

6. The method of claim 1 , wherein the one or more identified memories comprises one or more of:

main memory;

non-core memory;

local area network (LAN) memory; and

wide area network (WAN) memory.

7. The method of claim 1 further comprises:

initially storing the data result in main memory in a non-error encoded format; and

retrieving the data result from the main memory for the encoding.

8. A computing core comprises:

a processing module operable to execute encoding instructions to error encode a data result to produce one or more sets of encoded data slices;

main memory; and

a memory controller operable to:

receive a request to store the data result from the processing module;

determine whether to store the data result in an error encoded format;

when the data result is to be stored in the error encoded format:

facilitate encoding the data result in accordance with a dispersed storage error coding function to produce the one or more sets of encoded data slices, wherein the facilitating includes:

buffering the data result; and

when the processing module is available:

 sending the data result and encoding instructions to the processing module; and

 receiving the one or more sets of encoded data slices from the processing module;

determine where to store the one or more sets of encoded data slices; and

provide the one or more sets of encoded data slices to one or more identified memories for storage.

9. The computing core of claim 8 , wherein the memory controller is further operable to determine whether to store the data result in an error encoded format by:

accessing a memory map to determine that the data result is to be stored in the error encoded format.

10. The computing core of claim 8 , wherein the memory controller is further operable to determine where to store the one or more sets of encoded data slices by:

accessing a memory map to determine the one or more identified memories.

11. The computing core of claim 8 , wherein the memory controller is further operable to:

when the data result is to be stored in a non-error encoded format:

determine where to store the data result; and

provide the data result to an identified memory for storage.

12. The computing core of claim 8 , wherein the data result comprises one of:

a data result from executing one or more operating system instructions:

a data result from executing one or more application instructions: and

a data result from executing one or more software driver instructions.

13. The computing core of claim 8 , wherein the one or more identified memories comprises one or more of:

the main memory;

non-core memory;

local area network (LAN) memory; and

wide area network (WAN) memory.

14. The computing core of claim 8 , wherein the memory controller is further operable to:

facilitate initially storing the data result in main memory in a non-error encoded format; and

retrieve the data result from the main memory for the encoding.

Assignments (5)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS Recorded Jun 11, 2025
From: BARCLAYS BANK PLC, AS ADMINISTRATIVE AGENT
To: PURE STORAGE, INC.
Reel/Frame 071558/0523 →
SECURITY INTEREST Recorded Aug 26, 2020
From: PURE STORAGE, INC.
To: BARCLAYS BANK PLC AS ADMINISTRATIVE AGENT
Reel/Frame 053867/0581 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 9992063 AND 10334045 LISTED IN ERROR PREVIOUSLY RECORDED ON REEL 049556 FRAME 0012. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNOR HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 14, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: PURE STORAGE, INC.
Reel/Frame 052205/0705 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 21, 2019
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: PURE STORAGE, INC.
Reel/Frame 049556/0012 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2016
From: CLEVERSAFE, INC.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 038687/0596 →