IP Library Granted Patent US 8,654,892
Granted Patent B2
US 8,654,892 · App. 13/754,850 · Granted Feb 18, 2014

Multiple transmit antenna interleaver design

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Quick Facts
Patent No.
US 8,654,892
App. No.
13/754,850
Granted
Feb 18, 2014
Kind
B2
Abstract

An arrangement of interleavers allocates bits from an input symbol across sub-symbols transmitted via sub-carriers of multiple orthogonal frequency division multiplex (OFDM) carriers. The input bits are allocated in a fashion to provide separation across subcarriers, and rotation of sub-symbols across the OFDM carriers provides additional robustness in the present of signal path impairments.

Claims (156)

1. A wireless device comprising:

a wireless interface; and

processing circuitry, the wireless interface and the processing circuitry operable to process bits of an input symbol to form N orthogonal frequency division multiplex (OFDM) transmit streams across K subcarriers, wherein at least one input symbol comprises KN subsymbols, wherein at least one of the KN subsymbols comprises B bits of the input symbol and wherein each subsymbol is communicated via an associated subcarrier of the N transmit streams by:

interleaving the bits of the input symbol by at least one permutation to form permutated bits;

grouping permutated bits into subsymbols;

grouping the subsymbols into blocks of subsymbols; and

rotating the blocks of subsymbols between the N OFDM transmit streams, wherein N is greater than 1.

2. The wireless device of claim 1 , wherein the wireless interface and processing circuitry are further operable to allocate bits of an input symbol to OFDM transmit streams in a mode selected from a plurality of modes.

3. The wireless device of claim 1 , wherein the wireless interface and processing circuitry are further operable to map bit k of the input symbol to bit i of a first bit sequence according to the formula:

i

=

B

K

N

r

(

k

mod

r

)

+

k

r

k

=

0

,

1

,

,

B

K

N

-

1

wherein r denotes interleaving depth; and

wherein

k

r

 denotes the largest integer not exceeding the value

k

r

.

4. The wireless device of claim 3 , wherein the wireless interface and processing circuitry are further operable to map bit i of the first bit sequence to bit j of a second bit sequence according to the formula:

j

=

s

i

s

+

mod

(

i

+

B

K

N

-

ri

B

K

N

,

s

)

i

=

0

,

1

,

,

B

K

N

-

1

wherein s=max(B/2,1); and

wherein r denotes interleaving depth.

5. The wireless device of claim 4 , wherein the wireless interface and processing circuitry are further operable to:

group B bits of the second bit sequence to form subsymbols and group subsymbols into blocks comprising

K

rot

 subsymbols; and

wherein rot is the number of blocks transmitted via each of the N OFDM transmit streams and is any integer divisor of K.

6. The wireless device of claim 1 , wherein the wireless interface and processing circuitry are further operable to distribute the blocks of subsymbols across the N OFDM transmit streams according to an index, m, defined by the formula:

m =(rot* q *( N− 1)+ p )mod( N *rot);

wherein p=N *(0: rot−1)+ q ; and

wherein rot denotes any integer divisor of K, q denotes integer values such that 0≦q≦N−1, N denotes the number of OFDM transmit streams having indexes 0 through N−1; and (0:rot−1) denotes the sequence 0, 1, 2, . . . , (rot−1).

7. The wireless device of claim 1 , wherein the wireless interface and processing circuitry are further operable to be mode compliant with the Institute of Electrical and Electronics Engineers (IEEE) 802.11a standard (1999) and/or successor standards.

8. The wireless device of claim 1 , wherein the wireless interface and processing circuitry are further operable to be mode compliant with the Institute of Electrical and Electronics Engineers (IEEE) 802.11g standard (2003) and/or successor standards.

9. The wireless device of claim 1 , wherein the wireless interface and processing circuitry are further operable to transmit the N OFDM transmit streams via at least two antennas.

10. The wireless device of claim 9 , wherein transmitting the N OFDM transmit streams via at least two antennas is performed via Multiple Input Multiple Output (MIMO) transmit operations.

11. A wireless device comprising:

a wireless interface; and

processing circuitry, the wireless interface and the processing circuitry operable to process bits of an input symbol for transmission via a plurality of orthogonal frequency division multiplex (OFDM) transmit signals by:

for at least two interleaving operations:

interchanging bits of the input symbol according to respective associated permutations;

allocating bits of the input symbol to form subsymbols, each subsymbol associated with a subcarrier of one of the plurality of OFDM transmit signals;

block mapping groups of subsymbols into blocks of subsymbols; and

rotating the blocks of subsymbols between the plurality of OFDM transmit signals.

12. The wireless device of claim 11 , wherein the wireless interface and processing circuitry are further operable to allocate bits of an input symbol to OFDM transmit streams in a mode selected from a plurality of modes.

13. The wireless device of claim 11 , wherein the wireless interface and processing circuitry are further operable to be mode compliant with the Institute of Electrical and Electronics Engineers (IEEE) 802.11a standard (1999) and/or successor standards.

14. The wireless device of claim 11 , wherein the wireless interface and processing circuitry are further operable to be mode compliant with the Institute of Electrical and Electronics Engineers (IEEE) 802.11g standard (2003) and/or successor standards.

15. The wireless device of claim 11 , wherein the wireless interface and processing circuitry are further operable to transmit the plurality of OFDM transmit signals via at least two antennas.

16. The wireless device of claim 11 , wherein transmitting the plurality of OFDM transmit signals via at least two antennas is performed via Multiple Input Multiple Output (MIMO) transmit operations.

17. A method of operating a wireless device comprising:

processing bits of an input symbol to form N orthogonal frequency division multiplex (OFDM) transmit streams across K subcarriers, wherein at least one input symbol comprises KN subsymbols, wherein at least one of the KN subsymbols comprises B bits of the input symbol and wherein each subsymbol is communicated via an associated subcarrier of the N transmit streams, the processing by:

interleaving the bits of the input symbol by at least one permutation to form permutated bits;

grouping permutated bits into subsymbols;

grouping the subsymbols into blocks of subsymbols; and

rotating the blocks of subsymbols between the N OFDM transmit streams, wherein N is greater than 1.

18. The method of claim 17 , further comprising transmitting the N OFDM transmit streams via at least two antennas.

19. The method of claim 17 , further comprising transmitting the N OFDM transmit streams via at least two antennas is performed via Multiple Input Multiple Output (MIMO) transmit operations.

20. The method of claim 17 , wherein the at least one permutation is compliant with at least one of:

the Institute of Electrical and Electronics Engineers (IEEE) 802.11a standard (1999) and/or successor standards; and

the Institute of Electrical and Electronics Engineers (IEEE) 802.11g standard (2003) and/or successor standards.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2013
From: ALDANA, CARLOS H.; BAGCHI, AMIT G.; HOO, MIN CHUIN
To: BROADCOM CORPORATION
Reel/Frame 029727/0076 →