Block mapping in high efficiency video coding compliant encoders and decoders

1. An apparatus comprising:

a central processing unit; and

a parallel processing unit comprising

an array of software-configurable general purpose processors,

a globally-shared memory, wherein each of the software-configurable general purpose processors in said array of software-configurable general purpose processors has access to said globally-shared memory to execute one or more portions of at least one of (i) a decoding program, (ii) an encoding program, and (iii) an encoding and decoding program, and

a shared memory, wherein said shared memory is accessible by said central processing unit to program said shared memory with:

a transform unit array comprising a plurality of transform units arranged in arbitrary order, an individual transform unit of the transform unit array including a transform setting;

a coding unit array comprising a plurality of coding units arranged in arbitrary order, an individual coding unit of the transform unit array including a coding mode; and

a map array comprising a plurality of map elements, an individual map element of the plurality of map elements representing a block of image pixels and including indices specifying which transform unit of the transform unit array and which coding unit of the coding unit array apply to the block of image pixels,

wherein the transform unit array, the coding unit array, and the map array are packed into a contiguous region of the shared memory and transform units of the transform unit array and coding units of the coding unit array are accessible based on the map array without order dependencies or serialization requirements.

2. The apparatus according to claim 1 , wherein said at least one of (i) the decoding program, (ii) the encoding program, and (iii) the encoding and decoding program, when executed by said parallel processing unit, reconstructs a current frame using indices in said map array and one or more reference frames, and said current frame and said one or more reference frames are stored in said globally-shared memory.

3. The apparatus according to claim 2 , wherein the decoding program, the encoding program, and the encoding and decoding program are configured to (i) decode pictures, (ii) encode pictures, and (iii) encode and decode pictures, respectively, in compliance with one or more standard or proprietary codecs.

4. The apparatus according to claim 3 , wherein said one or more standard or proprietary codecs comprise High Efficiency Video Coding (HEVC).

5. The apparatus according to claim 1 , wherein the array of software-configurable general purpose processors is part of a graphics processing unit.

6. The apparatus according to claim 1 , wherein said map array is generated during encoding or decoding of a picture.

7. The apparatus according to claim 6 , wherein the map array is generated by the central processing unit during decoding and by the parallel processing unit during encoding.

8. The apparatus according to claim 7 , wherein the map array indicates which blocks of an array of coding units and which blocks of an array of transform units correspond to pixels associated with each element of the map array.

9. The apparatus according to claim 1 , wherein each of said software-configurable general purpose processors comprises one or more single instruction multiple data (SIMD) processors.

10. The apparatus according to claim 1 , wherein the map array, transform unit array, and coding unit array are stored in a contiguous portion of the shared memory.

11. A method comprising:

providing a central processing unit;

providing a parallel processing unit comprising:

an array of software-configurable general purpose processors,

a globally-shared memory, wherein each of the software-configurable general purpose processors in said array of software-configurable general purpose processors has access to said globally-shared memory to execute one or more portions of at least one of (i) a decoding program, (ii) an encoding program, and (iii) an encoding and decoding program, and

a shared memory, wherein said shared memory is accessible by said central processing unit to program said shared memory with

a transform unit array comprising a plurality of transform units arranged in arbitrary order, an individual transform unit of the transform unit array including a transform setting;

a coding unit array comprising a plurality of coding units arranged in arbitrary order, an individual coding unit of the transform unit array including a coding mode; and

a map array comprising a plurality of map elements, an individual map element of the plurality of map elements representing a block of image pixels and including indices specifying which transform unit of the transform unit array and which coding unit of the coding unit array apply to the block of image pixels,

wherein the transform units of the transform unit array and coding units of the coding unit array are accessible based on the map array without order dependencies or serialization requirements; and

storing the map array, the transform unit array, and the coding unit array in the shared memory.

12. The method of claim 11 , wherein storing the map array in the shared memory further comprises:

storing the map array, transform unit array, and coding unit array in a contiguous portion of the shared memory.

13. The method of claim 11 , further comprising:

reconstructing a current frame using indices in said map array and one or more reference frames, wherein the current frame and the one or more reference frames are stored in said globally-shared memory.

14. The method of claim 11 , further comprising:

generating the map array by the central processing unit during decoding; and

generating the map array by the parallel processing unit during encoding.

15. The method of claim 14 , wherein the map array indicates which blocks of an array of coding units and which blocks of an array of transform units correspond to pixels associated with each element of the map array.