IP Library Granted Patent US 8,747,177
Granted Patent B2
US 8,747,177 · App. 13/765,406 · Granted Jun 10, 2014

Light-emitting display and method of manufacturing the same

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Quick Facts
Patent No.
US 8,747,177
App. No.
13/765,406
Granted
Jun 10, 2014
Kind
B2
Abstract

A light-emitting display capable of maintaining low power consumption and improving display quality irrespective of the configuration of an auxiliary wiring. A second electrode and an auxiliary wiring are electrically connected to each other through a conductive contact section. Moreover, only a part of the auxiliary wiring is connected to the contact section. Even if the surface of the auxiliary wiring is oxidized, an increase in connection resistance is prevented. Moreover, a restriction on layout is not imposed at the time of forming the contact section.

Claims (33)

1. A method of manufacturing a light-emitting display comprising:

forming a drive element and a first wiring layer over a substrate, and electrically connecting the drive element and the first wiring layer;

forming a first conductive layer over the drive element and the first wiring layer;

forming a first electrode corresponding to the drive element, as well as an auxiliary wiring layer by patterning the first conductive layer;

forming a respective light emission section on the first electrode;

forming a second electrode of a material in which light from the light emission section is enabled to pass therethrough; and

forming a conductive contact layer, and electrically connecting the second electrode and the auxiliary wiring layer with the conductive contact layer,

wherein,

a portion of the second electrode is in direct contact with the conductive contact layer, and a portion of the auxiliary wiring layer is positioned above and in direct contact with the conductive contact layer.

2. The method of claim 1 , wherein the auxiliary wiring layer is formed of a material with resistance that is lower than that of the second electrode.

3. The method of claim 1 , wherein the first wiring layer and the conductive contact layer comprise a second conductive layer and are formed by patterning the second conductive layer.

4. The method of claim 3 , wherein the second electrode and the auxiliary wiring layer have portions that are in direct contact with each other and with the conductive contact layer.

5. The method of claim 3 , wherein:

the second conductive layer is made of a multilayer film, the multilayer film having (a) an uppermost layer comprising a low etching selectivity film made of a material having relatively low etching selectivity with respect to the first electrode, and (b) a lower layer comprising a high etching selectivity film made of a material having relatively high etching selectivity with respect to the first electrode, the uppermost layer being positioned above the lower layer in the multilayer film.

6. The method of claim 5 , further comprising:

forming a planarization insulating layer with an aperture in a region corresponding to the conductive contact layer, the planarization insulating layer being between the conductive contact layer and the second electrode; and

forming an interelectrode insulating layer with an aperture in a region corresponding to the conductive contact layer, the interelectrode insulating layer being between the planarization insulating layer and the second electrode,

wherein,

the aperture of the interelectrode insulating layer has a region that overlaps with the aperture of the planarization insulating layer.

7. The method of claim 3 , wherein:

the second conductive layer comprises a material having relatively low etching selectivity with respect to the first electrode, and

a thickness of the second conductive layer is such that only an upper layer portion of the conductive contact layer is partially removed upon forming the first electrode by patterning.

8. The method of claim 7 , further comprising:

forming a planarization insulating layer with an aperture in a region corresponding to the conductive contact layer, the planarization insulating layer being between the conductive contact layer and the second electrode; and

forming an interelectrode insulating layer with an aperture in a region corresponding to the conductive contact layer, the interelectrode insulating layer being between the planarization insulating layer and the second electrode,

wherein,

the aperture of the interelectrode insulating layer has a region that overlaps with the aperture of the planarization insulating layer.

9. The method of claim 1 , further comprising:

forming an insulating layer between the conductive contact layer and the second electrode; and

forming an aperture having a step-like side surface by selectively removing a region corresponding to the conductive contact layer in the insulating layer, the aperture being wider at a top portion thereof than at a bottom portion thereof.

10. The method of claim 9 , further comprising:

using a halftone mask or a ray tone mask when forming the aperture to create the step-like side surface.

11. The method of claim 1 , wherein the conductive contact layer comprises a material having high etching selectivity with respect to the first electrode.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 036106/0355 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2013
From: FUJIOKA, HIROFUMI; OZAWA, NOBUO
To: SONY CORPORATION
Reel/Frame 030199/0354 →