IP Library Patent Application 13766712
Patent Application
App. No. 13/766,712

DEPOSITION OF A HIGH SURFACE ENERGY THIN FILM LAYER FOR IMPROVED ADHESION OF GROUP I-III-VI2 SOLAR CELLS

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Quick Facts
Patent No.
US None
App. No.
13/766,712
Abstract

A thin film photovoltaic cell includes a light absorption layer of Group I-III-VI 2 semiconductor materials and a high surface energy thin film layer that improves adhesion between the light absorption layer and an underlying electrode layer. The high surface energy thin film either replaces or is deposited on top of the back electrode to decrease the formation of voids at the back interface during absorber growth/deposition and thereby enabling a wider process window and improved cell efficiencies. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Claims (22)

1 . A method of fabricating a solar cell, comprising:

forming at least one electrically conductive electrode layer above an aluminum foil substrate, and at least one electrically conductive diffusion barrier layer disposed between the aluminum foil substrate and the conductive electrode layer,

forming a high surface energy layer on the electrically conductive electrode layer, wherein the high surface energy layer is made of a material with a surface energy greater than a surface energy of the electrically conductive electrode layer; and

forming a light absorption layer on the high surface energy layer.

2 . The method of claim 1 , wherein the light absorption layer comprises Group I-III-VI 2 semiconductor materials.

3 . The method of claim 1 , further comprising forming a buffer layer on the light absorption layer to serve as a junction partner between the light absorption layer and a transparent electrode layer disposed on top of the buffer layer.

4 . The method of claim 1 , wherein the high surface energy layer increases energy required to form voids, thereby reducing voids formed during formation of the light absorption layer on the high surface energy layer.

5 . The method of claim 1 , further comprising forming a buffer layer on the light absorption layer.

6 . The method of claim 5 , further comprising forming a transparent electrode layer on the buffer layer, wherein the buffer layer serves as a junction partner between the light absorption layer and the transparent electrode layer.

7 . A device, comprising:

an aluminum foil substrate;

at least one electrically conductive electrode layer above the aluminum foil substrate

at least one electrically conductive diffusion barrier layer disposed between the aluminum foil substrate and the conductive electrode layer,

a high surface energy layer on the electrically conductive electrode layer, wherein the high surface energy layer is made of a material with a surface energy greater than a surface energy of the electrically conductive electrode layer; and

a light absorption layer on the high surface energy layer.

8 . The device of claim 7 , wherein the high surface energy layer increases energy required to form voids, thereby reducing voids formed during formation of the light absorption layer on the high surface energy layer.

9 . The device of claim 7 , wherein the light absorption layer comprises Group I-III-VI 2 semiconductor materials.

10 . The device of claim 7 , further comprising a buffer layer on the light absorption layer.

11 . The device of claim 10 , further comprising a transparent electrode layer on the buffer layer, wherein the buffer layer serves as a junction partner between the light absorption layer and the transparent electrode layer.

12 . The device of claim 7 , wherein an interface between the electrode layer and the absorber layer is characterized by a void fraction of between about 25% and about 50%.

13 . The device of claim 7 , wherein an interface between the electrode layer and the absorber layer is characterized by a void fraction between about 10% and about 25%.

14 . The device of claim 7 , wherein an interface between the electrode layer and the absorber layer is characterized by a void fraction between 0% and about 10%.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 21, 2014
From: NANOSOLAR, INC.
To: AERIS CAPITAL SUSTAINABLE IP LTD.
Reel/Frame 032502/0201 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 18, 2013
From: BROWN, GREGORY; KIMBALL, GREGORY; STONE, PETER
To: NANOSOLAR, INC.
Reel/Frame 029823/0083 →