High dynamic range imager system
An imaging system configured to capture an image is provided, the imaging system including a high dynamic range imager configured to capture at least one high dynamic range image, and circuitry, wherein scheduling tasks within a row time interval is arranged to permit sharing of circuits used for correlated double sampling with selective reset tasks and with pixel readout tasks, and wherein scheduling tasks within a row time interval is arranged to permit sharing of comparator with selective reset tasks and with pixel readout tasks, while also providing at least one selectable integration period for which the integration period is adjustable and set to substantially less than a row time interval.
1. A high dynamic range imaging system configured to capture a high dynamic range image, the imaging system comprising:
an image sensor comprising:
an array of pixels; and
circuitry in electrical communication with each pixel of said array of pixels;
wherein said circuitry is configured to independently select one integration period from a set of available integration periods for substantially each pixel of said array of pixels,
wherein said circuitry is further configured to conditionally reset a pixel of said array of pixels when a longest available integration period is not selected,
wherein said circuitry is further configured to substantially sequentially readout pixels of said array of pixels,
wherein said circuitry is further configured to perform said conditional reset during a blanking period of said readout.
2. The high dynamic range imaging system of claim 1 , wherein said circuitry is further configured to schedule tasks within a row time interval to permit sharing of circuits used for correlated double sampling with selective reset tasks and with pixel readout tasks while also providing at least one selectable integration period for which the integration period is adjustable and set to substantially less than the row time interval.
3. The high dynamic range imaging system of claim 1 , wherein a longest integration period of said plurality of available integration periods is greater than a plurality of row times, and a shortest integration period of said plurality of available integration periods is less than one row time.
4. The high dynamic range imaging system of claim 1 , wherein said circuitry comprises a column-parallel signal processing circuit, said column-parallel signal processing circuit being configured to address an analog pixel value of a pixel of said array of pixels and determine when to selectively initiate a new integration period for said pixel.
5. The high dynamic range imaging system of claim 4 , wherein selectively initiating a new integration period comprises selectively initiating a shorter integration period.
6. The high dynamic range imaging system of claim 4 , wherein said column-parallel signal processing circuit comprises a comparator, said comparator configured to share functionality with both circuitry configured for selective reset and circuitry configured for readout sampling.
7. An imaging system configured to capture an image, the imaging system comprising:
a high dynamic range imager configured to capture at least one high dynamic range image, said high dynamic range imager comprising circuitry; and
circuitry configured to schedule tasks within a row time interval to permit sharing of circuits used for correlated double sampling between selective reset tasks and pixel readout tasks while also providing at least one selectable integration period for which the integration period is adjustable and set to substantially less than the row time interval.
8. The imaging system of claim 7 , wherein a first selectable integration period of the at least one selectable integration period is longer than a second integration period.
9. The imaging system of claim 7 , wherein the circuitry is further configured to control an intermediate voltage corresponding to a conduction threshold to select the at least one selectable integration period.
10. The imaging system according to claim 9 , wherein the circuitry is further configured to detect a signal in a floating diffusion to select the at least one selectable integration period in response to a charge level exceeding the conduction threshold.