DOUBLE-SIDED HETEROJUNCTION SOLAR CELL BASED ON THIN EPITAXIAL SILICON
One embodiment of the present invention provides a double-sided heterojunction solar cell. The solar cell includes a lightly doped epitaxial crystalline Si (c-Si) base layer, a front-side passivation layer situated on the front side of the lightly doped epitaxial c-Si base layer, a back-side passivation layer situated on the back side of the lightly doped epitaxial c-Si base layer, a front-side emitter situated on the surface of the front-side passivation layer, a back surface field (BSF) layer situated on the surface of the back-side passivation layer, a front-side electrode, and a back-side electrode.
1 . A method for fabricating a double-sided heterojunction solar cell, comprising:
depositing a layer of heavily doped crystalline-Si (c-Si) on the surface of a metallurgical-grade silicon (MG-Si) substrate;
epitaxially forming a layer of lightly doped c-Si on the surface of the heavily doped c-Si layer;
removing the MG-Si substrate and the heavily doped c-Si layer;
forming a front-side passivation layer on the front side of the lightly doped c-Si layer;
forming a back-side passivation layer on the back side of the lightly doped c-Si layer;
forming a front-side emitter on the front-side passivation layer;
forming a back surface field (BSF) layer on the back-side passivation layer;
forming a front-side electrode grid; and
forming a back-side electrode.
2 . The method of claim 1 , further comprising texturing at least one surface of the lightly doped c-Si layer.
3 . The method of claim 1 , wherein the MG-Si substrate is removed using one or more of the following techniques:
mechanical grinding;
chemical wet etching;
dry etching; and
chemical mechanical polishing.
4 . The method of claim 1 , further comprising forming a transparent conductive oxide (TCO) layer on the front-side emitter and/or the BSF layer.
5 . The method of claim 1 , wherein the passivation layers comprise intrinsic amorphous Si (a-Si) or silicon oxide (SiO x ).
6 . The method of claim 1 , wherein the thickness of the passivation layers is between 2 nm and 8 nm.
7 . The method of claim 1 , wherein the emitter and/or the BSF layer comprise heavily doped a-Si.
8 . The method of claim 7 , wherein the thickness of the a-Si emitter and/or the BSF layer is between 5 nm and 50 nm, and wherein the doping concentration of the heavily doped a-Si is between 1×10 17 /cm 3 and 1×10 20 /cm 3 .
9 . The method of claim 1 , wherein the lightly doped c-Si layer is deposited using a chemical-vapor-deposition (CVD) technique, wherein the thickness of the lightly doped c-Si layer is between 20 μm and 100 μm, and wherein the doping concentration for the lightly doped c-Si layer is between 1×10 15 /cm 3 and 1×10 17 /cm 3 .
10 . The method of claim 1 , wherein the lightly doped c-Si layer is n-type doped, and wherein the front-side emitter and the BSF layer are doped with different types of dopants.
11 . The method of claim 1 , wherein the heavily doped c-Si layer acts as an impurity getter layer, wherein the heavily doped c-Si layer is deposited using a chemical-vapor-deposition (CVD) technique, wherein the thickness of the heavily doped c-Si layer is between 1 μm and 5 μm, and wherein the doping concentration for the heavily doped c-Si layer is between 1×10 17 /cm 3 and 1×10 20 /cm 3 .
12 . The method of claim 1 , wherein the front-side and the back-side passivation layers are formed in one step.
13 . The method of claim 1 , wherein the front-side emitter and the BSF layer are formed in one step.