Nonvolatile semiconductor memory device
View Patent ↗A nonvolatile semiconductor memory device, having a booster circuit capable of performing a boost operation with appropriate boost voltage arrival time without increasing the circuit size. The nonvolatile semiconductor memory device includes a timing generator circuit and a current load circuit which applies a current load to an output of a booster unit according to a signal from the timing generator circuit, thereby achieving an appropriate boost voltage arrival time by using the current load circuit in concert with the operation of erasing or writing on memory cells.
1. A nonvolatile semiconductor memory device having a booster circuit,
the booster circuit comprising a booster unit, an oscillator circuit, a timing generator circuit, a control clock generator circuit, and a current load circuit;
the timing generator circuit has an input terminal, which is connected to an output terminal of the control clock generator circuit, and an output terminal, which is connected to a first input terminal of the booster unit, to an input terminal of the oscillator circuit, and to an input terminal of the current load circuit;
the booster unit has a second input terminal, which is connected to an output terminal of the oscillator circuit, and an output terminal, which is connected to an output terminal of the current load circuit; and
the current load circuit applies or removes a current load to or from the output terminal of the booster unit at a timing generated by the timing generator circuit.
2. The nonvolatile semiconductor memory device according to claim 1 , wherein the current load circuit stops the operation in erasing or writing on a memory cell.
3. The nonvolatile semiconductor memory device according to claim 2 , wherein the current load circuit has a current load which decreases in a stepwise fashion before starting the operation of erasing or writing on the memory cell.
4. The nonvolatile semiconductor memory device according to any one of claim 1 , wherein the current load circuit has a current load applied to the output terminal of the booster unit which is increased or decreased according to a signal from a command decode circuit.