IP Library Granted Patent US 9,502,117
Granted Patent B2
US 9,502,117 · App. 13/778,728 · Granted Nov 22, 2016

Cell-level statistics collection for detection and decoding in flash memories

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Quick Facts
Patent No.
US 9,502,117
App. No.
13/778,728
Granted
Nov 22, 2016
Kind
B2
Abstract

Methods and apparatus are provided for collecting cell-level statistics for detection and decoding in flash memories. Data from a flash memory device is processed by obtaining one or more read values for a plurality of bits in a page of the flash memory device; and generating cell-level statistics for the flash memory device based on a probability that a data pattern was read from the plurality of bits given that a particular pattern was written to the plurality of bits. The cell-level statistics are optionally generated substantially simultaneously with a reading of the read values, for example, as part of a read scrub process. The cell-level statistics can be used to convert the read values for the plurality of bits to a reliability value for a bit among the plurality of bits.

Claims (25)

1. A method for processing data from a flash memory device, comprising the steps of:

obtaining one or more read values for a plurality of bits in one or more pages of said flash memory device; and

generating cell-level statistics for said flash memory device based on a probability that a data pattern was read from said plurality of bits given that a particular pattern was written to said plurality of bits.

2. The method of claim 1 , wherein said generating step is performed substantially simultaneously with a reading of said one or more read values.

3. The method of claim 1 , wherein said generating step is performed as part of a read scrub process.

4. The method of claim 1 , further comprising the step of converting said one or more read values for said plurality of bits to a reliability value for a bit among said plurality of bits based on said cell-level statistics.

5. The method of claim 4 , wherein said reliability value comprises one or more of a log-likelihood ratio and an approximation of a log-likelihood ratio.

6. The method of claim 4 , wherein said reliability value maps a hard decision value to a soft input for processing by a soft decision decoder.

7. The method of claim 4 , further comprising the step of storing said reliability value in a lookup table.

8. The method of claim 1 , wherein said cell-level statistics are one or more of stored by a flash controller and stored in said flash memory device.

9. The method of claim 1 , wherein said cell-level statistics are collected in a location-dependent manner.

10. The method of claim 1 , wherein said cell-level statistics comprise pattern-dependent cell-level statistics for a victim cell and at least one aggressor cell of said flash memory device.

11. The method of claim 1 , wherein said cell-level statistics are based on a number of errors from each state to another state divided by a total count of each state.

12. The method of claim 1 , further comprising the step of storing said probability that said data pattern was read from said plurality of bits given that said particular pattern was written to said plurality of bits in one or more tables.

13. The method of claim 1 , wherein said probability that said data pattern was read from said plurality of bits given that said particular pattern was written to said plurality of bits is based on one or more decoded decisions.

14. The method of claim 1 , wherein said probability that said data pattern was read from said plurality of bits given that said particular pattern was written to said plurality of bits is based on one or more performance factors of said flash memory device.

15. A tangible machine-readable recordable storage medium for processing data from a flash memory device, wherein one or more software programs when executed by one or more processing devices implement the steps of the method of claim 1 .

16. A flash memory device, comprising:

a statistics collection unit configured to:

obtain one or more read values for a plurality of bits in one or more pages of said flash memory device; and

generate cell-level statistics for said flash memory device based on a probability that a data pattern was read from said plurality of bits given that a particular pattern was written to said plurality of bits.

17. The flash memory device of claim 16 , wherein said cell-level statistics are generated substantially simultaneously with a reading of said one or more read values.

18. The flash memory device of claim 16 , wherein said cell-level statistics are generated as part of a read scrub process.

19. The flash memory device of claim 16 , further comprising a reliability value generation unit to convert said one or more read values for said plurality of bits to a reliability value for a bit among said plurality of bits based on said cell-level statistics.

20. The flash memory device of claim 16 , wherein said cell-level statistics comprise pattern-dependent cell-level statistics for a victim cell and at least one aggressor cell of said flash memory device.

Assignments (4)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2015
From: LSI CORPORATION
To: SEAGATE TECHNOLOGY LLC
Reel/Frame 034770/0859 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2013
From: CHEN, ZHENGANG; HARATSCH, ERICH F.
To: LSI CORPORATION
Reel/Frame 029887/0392 →