Apparatus for programmable insertion delay to delay chain-based time to digital circuits
View Patent ↗An apparatus for delaying a plurality of chain-based time-to-digital circuits (TDCs). The apparatus includes a plurality of propagation path devices each connected to a respective one of the plurality of TDCs, each propagation path device delays a common start signal by a selectable amount based on a delay selection signal received by the propagation path device, and transmits the delayed start signal to the respective one of the TDCs.
1. A positron emission tomography (PET) system, comprising:
a plurality of chain-based time-to-digital circuits (TDCs) that each measure arrival time of detected photons; and
a plurality of propagation path devices connected to the TDCs, respectively, each propagation path device configured to delay a common start signal sent to each propagation path device by a selectable amount based on a delay selection signal received by the propagation path device, and to transmit the delayed start signal to the respective one of the TDCs.
2. The system according to claim 1 , wherein each propagation path device includes a plurality of delay modules each providing a different amount delay to the start signal.
3. The system according to claim 2 , wherein the plurality of delay modules of each propagation path device are disposed in series between an input receiving the start signal and an output connected to the respective one of the TDCs.
4. The system according to claim 2 , wherein each of the plurality of delay modules is activated to receive the start signal based on the delay selection signal.
5. The system according to claim 4 , wherein the plurality of delay modules of each propagation path device are disposed in series between an input receiving the start signal and an output connected to the respective TDC and when one of the delay modules is activated by the delay selection signal, the start signal bypasses each delay module upstream from the activated delay module and passes though each delay module downstream from the activated delay module.
6. The system according to claim 2 , wherein each of the plurality of delay modules includes at least one hardware based look up table (LUT).
7. The system according to claim 2 , wherein each of the plurality of delay modules includes at least one flip-flop.
8. The system according to claim 4 , wherein the delay selection signal is determined by user input.
9. The system according to claim 4 , wherein the delay selection signal is determined by an algorithm which determines the optimal propagation delay for each TDC.
10. An apparatus for delaying a signal to a plurality of chain-based time-to-digital circuits (TDCs), comprising:
a plurality of propagation path devices each connected to a respective one of the plurality of TDCs,
wherein each propagation path device includes
an input receiving a start signal,
an output connected to the respective TDC, and
a plurality of delay modules disposed in series between the input and the output,
wherein one of the delay modules, when the one of the delay modules is activated by a delay selection signal, receives the start signal and delays the start signal by a selectable amount and transmits the delayed start signal to the respective one of the TDCs, and
wherein the start signal bypasses each delay module upstream from the activated delay module and passes through each delay module downstream from the activated delay module.
11. The system according to claim 10 , wherein each one of the plurality of TDCs is connected to a plurality of dedicated propagation path devices.