Controller with power saving for power converters and method for the same

1. A controller with power saving for a power converter, comprising:

a delay circuit, for determining a delay time;

a switching signal generation circuit, coupled to generate a switching signal which controls a power switch coupled to a transformer of the power converter for a regulation of said power converter;

a detection circuit, coupled to said switching signal generation circuit, wherein whenever an output load of said power converter is lower than a light-load threshold, said switching signal is generated in a burst switching manner, and said detection circuit activates said delay circuit; and

an output circuit, generating a power-saving signal to cease switching of said switching signal after said delay time ends, wherein if said output load increases while said power-saving signal is ceasing said switching of said switching signal, said switching of said switching signal is resumed,

wherein said switching signal generation circuit is responsive to said output load during which said switching of said switching signal is being ceased.

2. The controller as claimed in claim 1 , further comprising a counter circuit coupled to said delay circuit, said counter circuit and said delay circuit determine a sleep period, wherein said output circuit generates said power-saving signal to cease said switching of said switching signal after said sleep period ends.

3. The controller as claimed in claim 1 , wherein said output load is detected by detecting a feedback signal correlated to an output of said power converter.

4. The controller as claimed in claim 3 , wherein said detection circuit deactivates said power-saving signal whenever said feedback signal becomes higher than a recovery threshold.

5. The controller as claimed in claim 1 , wherein said detection circuit deactivates said power-saving signal whenever a number of switching pulses of said switching signal exceeds a determined pulse count.

6. The controller as claimed in claim 1 , wherein an output voltage of said power converter and a supply voltage of said controller ramp down whenever said switching of said switching signal is ceased.

7. The controller as claimed in claim 6 , further comprising a wake-up circuit coupled to said switching signal generation circuit and said detection circuit to avoid said supply voltage of said controller falling below a shut-down threshold.

8. A method of power saving for a power converter, comprising:

enabling at least one first driving pulse group in a first time range which is generated by a controller in a burst switching mode to keep a supply voltage of the controller of the power converter around a regulated magnitude which is approximately constant;

determining a mode period once a feedback signal of said controller is lower than a burst threshold;

disabling said first driving pulse group whenever said mode period exceeds a sleep period, wherein said supply voltage of the controller starts to ramp down to be lower than a wake-up threshold when the said first driving pulse group is disabled;

enabling at least one second driving pulse group in a second time range which is generated by said controller in said burst switching mode to pull up said supply voltage of said controller to said regulated magnitude whenever said supply voltage of said controller reaches the wake-up threshold, wherein during which said supply voltage of said controller is ramping down, said power converter is responsive to load changes; and

enabling a third driving pulse group in a third time range in a continuous manner whenever an output current of said power converter is available.