SEMICONDUCTOR DEVICE
A semiconductor device sends and receives electrical signals. The semiconductor device includes a first substrate provided with a first circuit region containing a first circuit; a multi-level interconnect structure provided on the first substrate; a first inductor provided in the multi-level interconnect structure so as to include the first circuit region; and a second inductor provided in the multi-level interconnect structure so as to include the first circuit region, wherein one of the first inductor and the second inductor is connected to the first circuit and the other of the first inductor and the second inductor is connected to a second circuit.
1 . A semiconductor device comprising:
a multi-level interconnect structure provided over a substrate;
an inductor provided in the multi-level interconnect structure so as to surround all external connection terminals provided over the substrate in a plan view; and
a further inductor provided in the multi-level interconnect structure so as to surround the all external connection terminals provided over the substrate in a plan view,
wherein the further inductor is provided over the inductor.
2 . The semiconductor device according to claim 1 , wherein the external connection terminal is a pad.
3 . The semiconductor device according to claim 1 ,
wherein the substrate is provided with a circuit region including a circuit such that each of the inductor and the further inductor is provided so as to surround all transistors included in the circuit and such that one of the inductor and the further inductor is connected to the circuit.
4 . A semiconductor device comprising:
a multi-level interconnect structure provided over a substrate;
an inductor provided in the multi-level interconnect structure so as to surround all external connection terminals provided over the substrate in a plan view; and
a further inductor provided in the multi-level interconnect structure so as to arranged within all circuits provided over a circuit region of the substrate in a plan view,
wherein the further inductor is provided over the inductor.
5 . The semiconductor device according to claim 4 , wherein the external connection terminal is a pad.
6 . The semiconductor device according to claim 4 ,
wherein each of the inductor and the further inductor is provided so as to surround all transistors included in the all circuits, and such that one of the inductor and the further inductor is connected to the circuit.
7 . A semiconductor device comprising:
a multi-level interconnect structure provided over a substrate;
an inductor provided in the multi-level interconnect structure so as to surround all external connection terminals provided over the substrate in a plan view.
8 . The semiconductor device according to claim 7 , further comprising:
a further inductor provided in the multi-level interconnect structure and over the substrate in a plan view such that the further inductor is provided over the inductor.
9 . The semiconductor device according to claim 7 ,
wherein the inductor is provided so as to surround all transistors included in a circuit of the substrate such that the inductor is connected to the circuit.
10 . The semiconductor device according to claim 7 ,
wherein the external connection terminal is a pad.
11 . A semiconductor device comprising:
a multi-level interconnect structure provided over a substrate;
an inductor provided in the multi-level interconnect structure so as to arranged within all circuits provided over the substrate in a plan view.
12 . The semiconductor device according to claim 11 , further comprising:
a further inductor provided in the multi-level interconnect structure so as to surround all external connection terminals provided over the substrate in a plan view,
wherein the inductor is provided over the further inductor.
13 . The semiconductor device according to claim 12 ,
wherein the external connection terminal is a pad.
14 . The semiconductor device according to claim 11 ,
wherein the inductor is provided so as to surround all transistors included in the circuits for connecting thereto.