IP Library Granted Patent US 9,202,768
Granted Patent B2
US 9,202,768 · App. 13/789,064 · Granted Dec 1, 2015

Semiconductor module

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Quick Facts
Patent No.
US 9,202,768
App. No.
13/789,064
Granted
Dec 1, 2015
Kind
B2
Abstract

According to one embodiment, a semiconductor module has a substrate, two nonvolatile memories disposed on a first surface of the substrate, a controller to control the nonvolatile memories, disposed on the first surface of the substrate and between the two nonvolatile memories, and a plurality of terminals that are electrically connected to the two nonvolatile memories and to the controller, disposed on a second surface of the substrate.

Claims (46)

1. A method for cooling a semiconductor module comprising a substrate, two nonvolatile memories disposed on a first surface of the substrate, and a controller to control the nonvolatile memories disposed on the first surface of the substrate and between the two nonvolatile memories, the method comprising:

disposing a ball grid array that is electrically connected to the nonvolatile memories and the controller, on a second surface of the substrate, so that heat generated by the nonvolatile memories and the controller is conducted to the ball grid array, the ball grid array being positioned directly below each of the two nonvolatile memories, the ball grid array being connectable to an external device.

2. The method according to claim 1 , further comprising:

disposing in the substrate a plurality of metal vias, which electrically connect between the two nonvolatile memories and the ball grid array, and between the controller and the ball grid array in the substrate.

3. The method according to claim 1 , further comprising:

disposing a cooler over the two nonvolatile memories and the controller, so that the heat generated by the nonvolatile memories and the controller is also conducted to the cooler.

4. The method according to claim 3 , further comprising:

flowing a coolant in a heat pipe disposed in the cooler.

5. The method according to claim 3 , further comprising:

disposing a thermal interface between the cooler and each of the nonvolatile memories, and between the cooler and the controller.

6. A semiconductor module, comprising:

a substrate;

at least two nonvolatile memories disposed on a first surface of the substrate;

a controller to control the nonvolatile memories, disposed on the first surface of the substrate and between the at least two nonvolatile memories; and

a ball grid array that is electrically connected to the controller, disposed on a second surface of the substrate, the ball grid array being positioned below the two nonvolatile memories, the ball grid array being connectable to an external device.

7. The semiconductor module according to claim 6 , wherein

the nonvolatile memories are NAND flash memories.

8. The semiconductor module according to claim 6 , wherein

a plurality of metal vias extend through the substrate, and

the metal vias electrically connect between the two nonvolatile memories and the ball grid array and between the controller and the ball grid array.

9. The semiconductor module according to claim 6 , wherein

a distance between one of the two nonvolatile memories and the controller is substantially the same as a distance between the other of the two nonvolatile memories and the controller.

10. The semiconductor module according to claim 6 , further comprising:

a cooler disposed over the two nonvolatile memories and the controller.

11. The semiconductor module according to claim 10 , wherein

the cooler includes at least one heat pipe in which a coolant flows.

12. The semiconductor module according to claim 10 , wherein

the cooler includes a plurality of heat pipes in which a coolant flows.

13. The semiconductor module according to claim 10 , further comprising:

a thermal interface disposed between the cooler and each of the nonvolatile memories and between a heat sink and the controller.

14. The semiconductor module according to claim 13 , wherein

the thermal interface comprises a plurality of thermal interface members that are disposed on the nonvolatile memories and the controller, respectively.

15. A semiconductor module, comprising:

a substrate;

two nonvolatile memories disposed on a first surface of the substrate;

a controller to control the nonvolatile memories, disposed on the first surface of the substrate and between the two nonvolatile memories;

a ball grid array disposed on a second surface of the substrate below the two nonvolatile memories; and

a cooler disposed over the two nonvolatile memories and the controller.

16. The semiconductor module according to claim 15 , wherein

the nonvolatile memories are NAND flash memories.

17. The semiconductor module according to claim 15 , wherein

the cooler includes at least one heat pipe in which a coolant flows.

18. The semiconductor module according to claim 15 , further comprising:

a thermal interface disposed between the cooler and each of the nonvolatile memories, and between the cooler and the controller.

19. The semiconductor module according to claim 15 , wherein

a distance between one of the two nonvolatile memories and the controller is substantially the same as a distance between the other of the two nonvolatile memories and the controller.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043194/0647 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2013
From: AOKI, HIDEAKI; OYAMA, KATSUHIKO; NISHIYAMA, TAKU; TAKUBO, CHIAKI; SAKAI, KATSUYA
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 030580/0952 →