Apparatus and Method for Memory Operation Bonding
A processor is configured to evaluate memory operation bonding criteria to selectively identify memory operation bonding opportunities within a memory access plan. Memory operations are combined in response to the memory operation bonding opportunities to form a revised memory access plan with accelerated memory access.
1 . A processor configured to:
evaluate memory operation bonding criteria to selectively identify memory operation bonding opportunities within a memory access plan; and
create combined memory operations in response to the memory operation bonding opportunities to form a revised memory access plan with accelerated memory access.
2 . The processor of claim 1 wherein the revised memory access plan utilizes a wider data channel than the data channel utilized by the memory access plan.
3 . The processor of claim 1 wherein the revised memory access plan utilizes a pipelined memory access.
4 . The processor of claim 1 wherein the memory operation bonding criteria specifies adjacent load or store instructions.
5 . The processor of claim 1 wherein the memory operation bonding criteria specifies a common memory type for two memory operations.
6 . The processor of claim 1 wherein the memory operation bonding criteria specifies a common base address register for two memory operations.
7 . The processor of claim 1 wherein the memory operation bonding criteria specifies consecutive memory locations.
8 . The processor of claim 1 wherein the memory operation bonding criteria specifies displacement differing by access size.
9 . The processor of claim 8 wherein the memory operation bonding criteria specifies that in the case of loads, the destination of the first memory operation is not a source for the second memory operation.
10 . The processor of claim 1 wherein the memory operation bonding criteria specifies an aligned address after bonding.
11 . A non-transitory computer readable storage medium comprising executable instructions to define a processor configured to:
evaluate memory operation bonding criteria to selectively identify memory operation bonding opportunities within a memory access plan; and
create combined memory operations in response to the memory operation bonding opportunities to form a revised memory access plan with accelerated memory access.
12 . The non-transitory computer readable storage medium of claim 11 wherein the revised memory access plan utilizes a wider data channel than the data channel utilized by the memory access plan.
13 . The non-transitory computer readable storage medium of claim 11 wherein the revised memory access plan utilizes a pipelined memory access.
14 . The non-transitory computer readable storage medium of claim 11 wherein the memory operation bonding criteria specifies adjacent load or store instructions.
15 . The non-transitory computer readable storage medium of claim 11 wherein the memory operation bonding criteria specifies a common memory type for two memory operations.
16 . The non-transitory computer readable storage medium of claim 11 wherein the memory operation bonding criteria specifies a common base address register for two memory operations.
17 . The non-transitory computer readable storage medium of claim 11 wherein the memory operation bonding criteria specifies consecutive memory locations.
18 . The non-transitory computer readable storage medium of claim 11 wherein the memory operation bonding criteria specifies displacement differing by access size.
19 . The non-transitory computer readable storage medium of claim 18 wherein the memory operation bonding criteria specifies that in the case of loads, the destination of the first memory operation is not a source for the second memory operation.
20 . The non-transitory computer readable storage medium of claim 11 wherein the memory operation bonding criteria specifies an aligned address after bonding.