Method for forming a buried p-n junction and articles formed thereby
View Patent ↗Methods for forming a buried p-n junction and avalanche photodiodes incorporating same are disclosed. The method includes forming a well in a semiconductor layer, wherein a depth of the well is selected as a function of the desired shape of the p-n junction in the edge region of the avalanche photodiode. A diffusion mask is then formed on the semiconductor layer, wherein the diffusion mask includes at least two openings per APD formed, wherein one opening is a diffusion window and the other is a diffusion sink. The depth of the p-n junction in the active region of the APD is based, in part, on an attribute of the diffusion mask relating to the diffusion sink.
1. A method comprising:
forming a well in a semiconductor layer, wherein the well has a depth that, with a single diffusion of dopant, achieves a desired profile for a peripheral portion of a p-n junction;
forming a diffusion mask over the semiconductor layer, wherein the diffusion mask comprises a diffusion window and a diffusion sink; and
diffusing the dopant into the semiconductor layer through the diffusion mask, thereby forming, in a single diffusion of dopant, the p-n junction having the desired profile of the peripheral portion.
2. The method of claim 1 wherein an attribute of the diffusion mask affects the depth to which the dopant diffuses and wherein the attribute is selected to achieve a desired diffusion depth.
3. The method of claim 2 wherein the attribute is a separation distance between the diffusion sink and the diffusion window.
4. The method of claim 2 wherein the attribute is a width of the diffusion sink.
5. The method of claim 1 wherein the diffusion sink comprises a polygonal annulus.
6. The method of claim 1 wherein the diffusion sink and the diffusion window are concentric with respect to one another.
7. The method of claim 1 wherein the operation of forming a well further comprises:
determining a desired profile for the peripheral portion of the p-n junction; and
determining the depth of the well required to achieve the desired profile for the peripheral portion of the p-n junction.
8. The method of claim 1 wherein the operation of forming the diffusion mask further comprises:
determining a desired breakdown voltage for an avalanche photodiode to be formed via the method; and
determining the depth to which the dopant is to be diffused through the diffusion window based on the desired breakdown voltage.
9. The method of claim 2 further comprising determining the attribute of the diffusion sink that achieves the desired diffusion depth.
10. A method comprising:
forming a well in a semiconductor layer, wherein the well has a depth that achieves a desired profile for a peripheral portion of a p-n junction;
forming a diffusion mask over the semiconductor layer, wherein the diffusion mask comprises a diffusion window and a diffusion sink, and wherein a separation distance between the diffusion window and the diffusion sink is selected to achieve a desired diffusion depth; and
diffusing dopant through the diffusion mask into the semiconductor layer to form, in a single dopant diffusion, the p-n junction at the desired depth and having a peripheral portion with the desired profile.
11. A method comprising:
forming a well in a semiconductor layer, wherein the well has a depth that achieves a desired profile for a peripheral portion of a p-n junction;
forming a diffusion mask over the semiconductor layer, wherein the diffusion mask comprises a diffusion window and a diffusion sink, and wherein a width of the diffusion sink is selected to achieve a desired diffusion depth; and
diffusing dopant through the diffusion mask into the semiconductor layer to form, in a single dopant diffusion, the p-n junction at the desired depth and having a peripheral portion with the desired profile.