Dual voltage communication bus
View Patent ↗A bidirectional bus system that includes a bus master having a first transmitter coupled to a bidirectional bus. The first transmitter transmits a signal in a first voltage range onto the bus. The bus master has a first receiver coupled to the bus. A bus slave having a second transmitter coupled to the bus is included. The second transmitter transmits a signal in a second voltage range onto the bus, where the bus slave having a second receiver is coupled to the bus. The first receiver is configured to interpret the signal in the first voltage range to indicate an idle state while the second receiver interprets the signal in the first voltage range as indicating data. The second receiver interprets the signal in the second voltage range as indicative of an idle state while the first receiver interprets the signal in the second voltage range as indicating data.
1. A bidirectional bus system, comprising:
a bus master having a first transmitter configured to couple to a bidirectional bus, the first transmitter operable to transmit a signal in a first voltage range onto the bidirectional bus, the bus master having a first receiver configured to couple to the bidirectional bus; and
a bus slave having a second transmitter configured to couple to the bidirectional bus, the second transmitter operable to transmit a signal in a second voltage range onto the bidirectional bus, the bus slave having a second receiver configured to couple to the bidirectional bus, wherein the first receiver is configured to interpret the signal in the first voltage range as indicative of an idle state while the second receiver interprets the signal in the first voltage range as communicative of data, and wherein the second receiver is configured to interpret the signal in the second voltage range as indicative of the idle state while the first receiver interprets the signal in the second voltage range as communicative of data, wherein the first voltage range includes a first voltage sub range and a second voltage sub range, the second voltage range includes the second voltage sub range and a third voltage sub range, the first voltage sub range is at a greater voltage than the second voltage sub range, the second voltage sub range is at a greater voltage than the third voltage sub range, the first voltage sub range is separated from the second voltage sub range by a first guard band, and the second voltage sub range is separated from the third voltage sub range by a second guard band.
2. The bidirectional bus system of claim 1 , wherein:
the bus master is operable to broadcast a first message onto the bidirectional bus with the signa in the first voltage range;
the second receiver of the bus slave receives the message and the first receiver of the bus master ignores the first message;
the bus slave is operable to send a second message onto the bidirectional bus with the signal in the second range; and
the first receiver of the bus master receives the second message and the second receiver of the bus slave ignores the second message.
3. The bidirectional bus system of claim 1 , wherein:
the first receiver is configured to interpret the first voltage sub range as a logical one and the second receiver is configured to interpret as a logical zero;
the first voltage range and the second voltage range overlap;
the overlap of the first voltage range and the second voltage range includes the second voltage sub range that the first receiver is configured to interpret as a logical one and the second receiver is configured to interpret as a logical one; and
the second voltage range includes the third voltage sub range that the first receiver is configured to interpret as a logical zero and the second receiver is configured to interpret as a logical one.
4. The bidirectional bus system of claim 1 , further comprising:
a biasing circuit configured to couple to the bidirectional bus and to establish a differential voltage on the bidirectional bus.
5. The bidirectional bus system of claim 1 , further comprising:
the second transmitter having an isolation circuit that accepts coupling to a device having an operating voltage that differs from voltages of the bidirectional bus.
6. The bidirectional bus system of claim 1 , further comprising:
the second receiver having an isolation circuit that accepts coupling to a device having an operating voltage that differs from voltages of the bidirectional bus.
7. A bidirectional bus system, comprising:
a bus master having a first differential output circuit configured to couple to a bidirectional bus and to express differential voltages in a first voltage range on the bidirectional bus during master transmission, the bus master having a first differential input amplifier configured to couple to the bidirectional bus, the first differential input amplifier being configured to receive the differential voltages in the first voltage range as showing , the first differential input amplifier being configured to receive differential voltages in a second voltage range as showing an active communication that includes two logic values; and
a bus slave having a second differential output circuit configured to couple to the bidirectional bus and to express the differential voltages in the second voltage range on the bidirectional bus during slave transmission, the bus slave having a second differential input amplifier configured to couple to the bidirectional bus, the second differential input amplifier being configured to receive the differential voltages in the first voltage range as showing a further active communication that includes the two logic values, the second differential amplifier being configured to receive the differential voltages in the second voltage range as showing the single logic value.
8. The bidirectional bus system of claim 7 , further comprising:
a resistor ladder configured to bias the bidirectional bus to a differential voltage value contained in an overlap of the first voltage range and the second voltage range, the resistor ladder being further configured to terminate the bidirectional bus.
9. The bidirectional bus system of claim 7 , wherein:
the first differential output circuit includes a buffer coupled to a first switch and coupled to a second switch;
the first switch is configured to couple to a first wire of the bidirectional bus and couple to a positive power supply voltage;
the second switch is configured to couple to a second wire of the bidirectional bus and couple to an electrical ground; and
the first and second switches are configured to be closed when the bus master expresses a differential voltage in a first voltage sub range and open when the bus master expresses a differential voltage in a second voltage sub range, wherein the first voltage range includes the first voltage sub range and the second voltage sub range.
10. The bidirectional bus system of claim 7 , wherein:
the second differential output circuit includes an optoisolator having an output configured to couple to the bidirectional bus; and
the optoisolator is configured to present a first impedance to the bidirectional bus when the bus slave expresses a differential voltage in a second voltage sub range and present a second impedance to the bidirectional bus when the bus slave expresses a differential voltage in a third voltage sub range, wherein the second voltage range includes the second voltage sub range and the third voltage sub range.
11. The bidirectional bus system of claim 7 , wherein the second differential input amplifier includes an optoisolator having an input configured to couple to the bidirectional bus.
12. The bidirectional bus system of claim 11 , further comprising:
a diode coupled to one input of the optoisolator.
13. The bidirectional bus system of claim 8 , further comprising:
a first UART (universal asynchronous receiver and transmitter) coupled to the bus master; and
a second UART coupled to the bus slave;
wherein the single logic value is compatible with an idle state of the first UART and an idle state of the second UART.
14. A method of operating a bidirectional bus, comprising:
transmitting onto a bidirectional bus a first sequence of voltages that includes a voltage in a first voltage range and a voltage in a second voltage range;
interpreting the first sequence of voltages, at a first location, as associated with an idle state;
interpreting the first sequence of voltages, at a second location, as a first active communication having application of two logic values;
transmitting onto the bidirectional bus a second sequence of voltages that includes a further voltage in the second voltage range and a voltage in a third voltage range;
interpreting the second sequence of voltages, at the first location, as a second active communication having application of the two logic values; and
interpreting the second sequence of voltages, at the second location, as the single logic value associated with the idle state.
15. The method of claim 14 , wherein:
the first sequence of voltages is transmitted by a bus master;
the voltage in the first voltage range in the first sequence of voltages is interpreted by a first receiver of the bus master, at the first location, as a logical one;
the voltage in the second voltage range in the first sequence of voltages is interpreted by the first receiver of the bus master, at the first location, as a logical one;
the voltage in the first voltage range in the first sequence of voltages is interpreted by a second receiver of a bus slave, at the second location, as a logical zero;
the voltage in the second voltage range in the first sequence of voltages is interpreted by the second receiver of the bus slave, at the second location, as a logical zero;
the further voltage in the second voltage range in the second sequence of voltages is interpreted by the first receiver of the bus master, at the first location, as a logical one;
the voltage in the third voltage range in the second sequence of voltages is interpreted by the first receiver of the bus master, at the first location, as a logical zero;
the further voltage in the second voltage range in the second sequence of voltages is interpreted by the second receiver of the bus slave, at the second location, as a logical one; and
the voltage in the third voltage range in the second sequence of voltages is interpreted by the second receiver of the bus slave, at the second location, as a logical one.
16. The method of claim 14 , further comprising:
arranging a first guard band between the second voltage range and the first voltage range; and
arranging a second guard band between the second voltage range and the third voltage range.
17. The method of claim 14 , further comprising:
isolating a transmitter connection of a bus slave from the bidirectional bus so that the transmitter connection and the bidirectional bus are operable to have independent operating voltages.
18. The method of claim 14 , further comprising:
isolating a receiver connection of a bus slave from the bidirectional bus so that the receiver connection and the bidirectional bus are operable to have independent operating voltages.
19. The method of claim 14 , wherein:
transmitting the voltage in the first voltage range in the first sequence of voltages onto the bidirectional bus includes closing a first switch that couples a first wire of the bidirectional bus to a positive power supply voltage and closing a second switch that couples a second wire of the bidirectional bus to a ground connection;
transmitting the voltage in the second voltage range in the first sequence of voltages onto the bidirectional bus includes opening the first switch and opening the second switch;
transmitting the voltage in the second voltage range in the second sequence of voltages onto the bidirectional bus includes maintaining an impedance that couples the first wire and the second wire; and
transmitting the voltage in the third voltage range in the second sequence of voltages onto the bidirectional bus includes reducing the impedance that couples the first wire and the second wire.