Systems and methods for controlling aliasing in images captured by an array camera for use in super-resolution processing
View Patent ↗Imager arrays, array camera modules, and array cameras in accordance with embodiments of the invention utilize pixel apertures to control the amount of aliasing present in captured images of a scene. One embodiment includes a plurality of focal planes, control circuitry configured to control the capture of image information by the pixels within the focal planes, and sampling circuitry configured to convert pixel outputs into digital pixel data. In addition, the pixels in the plurality of focal planes include a pixel stack including a microlens and an active area, where light incident on the surface of the microlens is focused onto the active area by the microlens and the active area samples the incident light to capture image information, and the pixel stack defines a pixel area and includes a pixel aperture, where the size of the pixel apertures is smaller than the pixel area.
1. An imager array, comprising:
a plurality of focal planes, where each focal plane comprises a two dimensional arrangement of pixels having at least two pixels in each dimension and each focal plane is contained within a region of the imager array that does not contain pixels from another focal plane wherein each of the at least two pixels in the two dimensional arrangement of pixels comprises a pixel stack including a microlens and a pixel area where the microlens acts as a pixel aperture focusing light incident to the surface of the microlens on an active area in the pixel area where the size of the active area is less than a pixel pitch between pixels in the two dimensional arrangement and wherein the pixel pitch and the active area are sized based upon a desired resolution factor of super resolution processing performed on images captured by the plurality of focal planes to introduce a desired amount of aliasing into image data captured by each of the plurality of focal planes;
control circuitry configured to control the capture of image information by the pixels within the focal planes; and
sampling circuitry configured to convert pixel outputs into digital pixel data.
2. The imager array of claim 1 , wherein the pixel aperture is formed by a microlens that is smaller than an active area of a pixel.
3. The imager array of claim 2 , wherein gaps exist between adjacent microlenses in the pixel stacks of adjacent pixels in the two dimensional arrangement of pixels of a focal plane.
4. The imager array of claim 3 , wherein light is prevented from entering the pixel stacks in the two dimensional arrangement of pixels of a focal plane through the gaps between the microlenses by a light blocking material.
5. The imager array of claim 4 , wherein photoresist is located in the gaps between the microlenses in the two dimensional arrangement of pixels of a focal plane.
6. The imager array of claim 2 , wherein the amount of aliasing in an image captured by a focal plane is greater than the amount of aliasing that would be present were the microlens to occupy the entire pixel area defined by the pixel stack.
7. The imager array of claim 2 , wherein the pixel stack further comprise an oxide layer and the microlens sits atop the oxide layer.
8. The imager array of claim 7 , wherein the pixel stack includes a color filter.
9. The imager array of claim 8 , wherein the color filters in the pixel stack of each pixel in the two dimensional arrangement of pixels within a focal plane are the same.
10. The imager array of claim 8 , wherein the color filters in the pixel stacks of the two dimensional arrangement of pixels within at least one focal plane form a Bayer filter pattern.
11. The imager array of claim 7 , wherein the pixel stack does not include a color filter.
12. The imager array of claim 7 , wherein the pixel stack includes a nitride passivation layer and a bottom oxide layer that provides support and isolation for metal interconnects.
13. The imager array of claim 1 , wherein the pixel aperture is formed using at least one light blocking material.
14. An imager array, comprising:
a plurality of focal planes, where each focal plane comprises a two dimensional arrangement of pixels having at least two pixels in each dimension and each focal plane is contained within a region of the imager array that does not contain pixels from another focal plane wherein each of the at least two pixels in the two dimensional arrangement of pixels comprises a pixel stack including a microlens and an pixel area where the microlens acts as a pixel aperture focusing light incident to the surface of the microlens on an active area of the pixel area and the size of the active area is less than a pixel pitch between pixels in the two dimensional arrangement where the pixel pitch and the active area are sized to introduce a desired amount of aliasing into image data captured by each of the plurality of focal plane based upon a super resolution factor of super resolution processing that generates a super resolution image from image data captured by the plurality of focal planes and wherein gaps exist between microlenses in the pixel stacks of adjacent pixels in the two dimensional pixel arrangements of the plurality of focal planes and the pixel stack of each of the pixels in the two dimensional arrangement includes light blocking material to prevent light from entering the pixel stacks through the gaps between the microlenses;
control circuitry configured to control the capture pixels outputs from the pixels within the focal planes; and
sampling circuitry configured to convert the pixel outputs into image data.
15. An array camera module, comprising:
an imager array configured to capture light field image data, comprising:
a plurality of focal planes, where each focal plane comprises a two dimensional arrangement of pixels having at least two pixels in each dimension and each focal plane is contained within a region of the imager array that does not contain pixels from another focal plane wherein the at least two pixels in the two dimensional arrangement of pixels comprises a pixel stack including a microlens and a pixel area where the microlens acts as a pixel aperture and focuses light incident to the surface of the microlens on an active area of the pixel area where the active area is less in size than a pixel pitch between pixels in the two dimensional arrangement and the pixel pitch and the active area are sized to introduce a desired amount of aliasing into the light field image data captured by a pixel based upon a super resolution factor of super resolution processing that generates a super resolution image from the light field image data captured by the plurality of focal planes;
control circuitry configured to control the capture of pixel outputs from the pixels within the focal planes; and
sampling circuitry configured to convert the pixel outputs into light field image data.
16. The array camera module of claim 15 , wherein the pixel aperture formed by a microlens is smaller than the pixel area.
17. The array camera module of claim 16 , wherein gaps exist between adjacent microlenses in the pixel stacks of adjacent pixels in the two dimensional arrangement of pixels of a focal plane.
18. The array camera module of claim 17 , wherein light is prevented from entering the pixel stacks through the gaps between the microlenses of pixels in the two dimensional arrangement of pixels of a focal plane by a light blocking material.
19. The array camera module of claim 18 , wherein photoresist is located in the gaps between the microlenses of pixels in the two dimensional arrangement of pixels of a focal plane.
20. The array camera module of claim 16 , wherein the amount of aliasing in light field image data captured by a focal plane is greater than the amount of aliasing that would be present were the microlens to occupy the entire pixel area defined by the pixel stack.
21. The array camera module of claim 16 , wherein the pixel stack of each pixel in the two dimensional arrangement of pixels within at least one focal plane further comprise an oxide layer and the microlens sits atop the oxide layer.
22. The array camera module of claim 21 , wherein the pixel stack of each pixel in the two dimensional arrangement of pixels within at least one focal plane includes a color filter.
23. The array camera module of claim 22 , wherein the color filters in the pixel stack of each pixel in the two dimensional arrangement of pixels within at least one focal plane of the two dimensional arrangement of pixels within a focal plane are the same.
24. The array camera module of claim 22 , wherein the color filters in the pixel stacks of the two dimensional arrangement of pixels within at least one focal plane form a Bayer filter pattern.
25. The array camera module of claim 21 , wherein the pixel stack includes a nitride passivation layer and a bottom oxide layer that provides support and isolation for metal interconnects.
26. The array camera module of claim 15 , wherein the pixel aperture is formed using at least one light blocking material.