IP Library Granted Patent US 9,576,870
Granted Patent B2
US 9,576,870 · App. 13/809,575 · Granted Feb 21, 2017

Module package and production method

Inventors: Claus Reitlinger (Wolnzach, DE); Frank Rehme (Einhausen, DE); Rudolf Bart (Taufkirchen, DE)
Assignee: EPCOS AG
H01L23/28H01L21/56H01L21/563H01L21/565H01L23/295H01L23/315H01L23/3114H01L23/3121H01L23/3185H03H9/059H03H9/0542H03H9/1064H01L2224/16225H01L2224/16227H01L2224/73203H01L2924/00014H01L2924/01004H01L2924/01068
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Quick Facts
Patent No.
US 9,576,870
App. No.
13/809,575
Granted
Feb 21, 2017
Kind
B2
Abstract

The invention relates to a module package which comprises a module substrate 1 , a chip 2, 3 applied using the flip chip process, and an encapsulation layer 8 , and to a method for producing same. The chip 2, 3 has component structures on the top side 13, 14 thereof. Said top said 13, 14 faces the module carrier 1 , wherein a gap 4, 5 is formed between the top side 13, 14 of the chip and the module carrier 1 . A filler is added to the encapsulation layer 8 . The encapsulation layer 8 partly fills underneath the chip 2, 3 , wherein at most the part of the chip 2, 3 , on which no component structures are present, is underfilled, and at a minimum the material of the encapsulation layer 8 completely encloses the sides of the chip 2, 3.

Claims (34)

1. A module package comprising:

a module substrate;

at least one chip which has component structures on its top side and the top side of which faces the module substrate, wherein a gap is formed between the chip top side and the module substrate; and

an encapsulation layer comprising a molding material with which a filler is admixed,

wherein the encapsulation layer only partly underfills the chip,

wherein as a maximum the part of the chip on which no component structures are situated is underfilled, and as a minimum the encapsulation layer terminates virtually flush with the side areas of the chip, and

wherein the filler has a particle size distribution in which at least one third of the filler particles have a diameter greater than the height of the gap between the chip top side and the module substrate.

2. The module package according to claim 1 , wherein the filler forms at least 75 percent by mass of the encapsulation layer.

3. The module package according to claim 1 , wherein the filler comprises silicon oxide.

4. The module package according to claim 1 , wherein the module substrate or chip has a supporting structure that narrows the gap between the chip and the module substrate.

5. The module package according to claim 1 , wherein at least one further component is applied on the module substrate, wherein a gap between the component and the module substrate is completely sealed with a filling compound.

6. The module package according to claim 1 , wherein the at least one chip comprises a SAW filter mounted using the flip-chip method.

7. A module package comprising:

a module substrate;

at least one chip which has component structures on its top side and the top side of which faces the module substrate, wherein a gap is formed between the chip top side and the module substrate; and

an encapsulation layer comprising a molding material with which a filler is admixed,

wherein the encapsulation layer only partly underfills the chip, wherein as a maximum the part of the chip on which no component structures are situated is underfilled, and as a minimum the encapsulation layer terminates virtually flush with the side areas of the chip,

wherein the filler has a particle size distribution in which at least one third of the filler particles have a diameter greater than the height of the gap between the chip top side and the module substrate, and

wherein the filler particles have angular outer surfaces.

8. A method for producing a module,

wherein a module carrier with at least one chip having component structures on its top side is populated in such a way that the top side of the chip faces the module carrier and a gap is formed between the chip top side and the module carrier,

wherein a molding compound, comprising a molding material with which a filler is admixed, is applied to at least one part of the module over a large area,

wherein the molding compound is cured to form an encapsulation layer,

wherein the material of the molding compound is selected in such a way that it has a gap penetration that leads to only partly underfilling of the at least one chip in such a way that as a maximum the part of the chip on which no component structures are situated is underfilled, and as a minimum the encapsulation layer terminates virtually flush with the side areas of the chip, and

wherein the filler has a particle size distribution in which at least one third of the filler particles have a diameter greater than the height of the gap between the chip top side and the module carrier.

9. The method according to claim 8 , wherein further components are applied on the module carrier, wherein a gap between the component and the module carrier is sealed with a filling compound.

10. The method according to claim 8 , wherein the molding compound is solidified thermally or by irradiation.

11. A method for producing a module,

wherein a module carrier with at least one chip having component structures on its top side is populated in such a way that the top side of the chip faces the module carrier and a gap is formed between the chip top side and the module carrier,

wherein a molding compound, comprising a molding material with which a filler is admixed, is applied to at least one part of the module over a large area,

wherein the molding compound is cured to form an encapsulation layer,

wherein the material of the molding compound is selected in such a way that it has a gap penetration that leads to only partly underfilling of the at least one chip in such a way that as a maximum the part of the chip on which no component structures are situated is underfilled, and as a minimum the encapsulation layer terminates virtually flush with the side areas of the chip,

wherein the filler has a particle size distribution in which at least one third of the filler particles have a diameter greater than the height of the gap between the chip top side and the module carrier, and

wherein temperature and pressure are chosen during method in such a way that a minimum viscosity of the molding compound is not undershot.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2017
From: EPCOS AG
To: SNAPTRACK, INC.
Reel/Frame 041608/0145 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 21, 2013
From: REITLINGER, CLAUS; REHME, FRANK; BART, RUDOLF
To: EPCOS AG
Reel/Frame 030064/0400 →
Priority Claims (1)
DE 10 2010 026 843 · Jul 12, 2010 · national
Continuity (1)
Related Publication 20130168876A1 · Jul 4, 2013