IP Library Granted Patent US 9,287,946
Granted Patent B2
US 9,287,946 · App. 13/810,783 · Granted Mar 15, 2016

Precoding method, and transmitting device

Inventors: Yutaka Murakami (Osaka, JP); Tomohiro Kimura (Osaka, JP); Mikihiro Ouchi (Osaka, JP)
Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
H04B7/0456H04L25/03898H04B7/0469H04B7/0606H04B7/0689
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Quick Facts
Patent No.
US 9,287,946
App. No.
13/810,783
Granted
Mar 15, 2016
Kind
B2
Abstract

Disclosed is a transmission scheme for transmitting a first modulated signal and a second modulated signal in the same frequency at the same time. According to the transmission scheme, a precoding weight multiplying unit multiplies a precoding weight by a baseband signal after a first mapping and a baseband signal after a second mapping and outputs the first modulated signal and the second modulated signal. In the precoding weight multiplying unit, precoding weights are regularly hopped.

Claims (156)

1. A precoding method comprising:

selecting, using a weighting information generator, one matrix from among N matrices F[i], wherein N is an integer of 1 or greater and i is an integer of 1 or greater and no greater than N, by hopping between the N matrices over each of a plurality of slots, the N matrices F[i] defining a precoding process that is performed on a plurality of modulated signals; and

generating, using a precoding calculator, a first precoding signal z 1 and a second precoding signal z 2 for each of the plurality of slots by performing a precoding process, which corresponds to the matrix selected from among the N matrices F[i], on a first modulated signal s 1 generated from a coded block of bits by using a first modulation scheme and a second modulated signal s 2 generated from the coded block of bits by using the first modulation scheme,

the first precoding signal z 1 and the second precoding signal z 2 satisfying (z 1 , z 2 ) T =F[i] (s 1 , s 2 ) T , and

the N matrices F[i] being expressed by the following equation (1):

Math

5

F

[

i

]

=

1

α

2

+

1

(

11

(

i

)

α

×

j

(

θ

11

(

i

)

+

λ

)

α

×

21

(

i

)

j

(

θ

21

(

i

)

+

λ

+

π

)

)

Equation

279

wherein α is a real number smaller than 1,

λi takes a different value for each i, and

each of the N matrices F[i] is selected at least once in N slots,

wherein the first modulation scheme converts M bits into one symbol, M being an integer of 1 or greater, and

the coded block of bits is composed of (2×N×M×L) bits, L being an integer of 1 or greater.

2. A precoding apparatus comprising:

a weighting information generator configured to, in operation, select one matrix from among N matrices F[i], wherein N is an integer of 1 or greater and i is an integer of 1 or greater and no greater than N, by hopping between the N matrices over each of a plurality of slots, the N matrices F[i] defining a precoding process that is performed on a plurality of modulated signals; and

a precoding calculator configured to, in operation, generate a first precoding signal z 1 and a second precoding signal z 2 for each of the plurality of slots by performing a precoding process, which corresponds to the matrix selected from among the N matrices F[i], on a first modulated signal s 1 generated from a coded block of bits by using a first modulation scheme and a second modulated signal s 2 generated from the coded block of bits by using the first modulation scheme,

the first precoding signal z 1 and the second precoding signal z 2 satisfying (z 1 , z 2 ) T =F[i] (s 1 , s 2 ) T , and

the N matrices F[i] being expressed by the following equation (1):

Math

6

F

[

i

]

=

1

α

2

+

1

(

α

×

11

(

i

)

j

(

θ

11

(

i

)

+

λ

)

21

(

i

)

α

×

j

(

θ

21

(

i

)

+

λ

+

π

)

)

Equation

280

wherein α is a real number smaller than 1,

λi takes a different value for each i, and

each of the N matrices F[i] is selected at least once in N slots,

wherein the first modulation scheme converts M bits into one symbol, M being an integer of 1 or greater, and

the coded block of bits is composed of (2×N×M×L) bits, L being an integer of 1 or greater.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2016
From: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
To: SUN PATENT TRUST
Reel/Frame 038299/0213 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
Reel/Frame 033033/0163 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2013
From: MURAKAMI, YUTAKA; KIMURA, TOMOHIRO; OUCHI, MIKIHIRO
To: PANASONIC CORPORATION
Reel/Frame 030238/0751 →
Priority Claims (6)
JP 2010-276457 · Dec 10, 2010 · national
JP 2010-293114 · Dec 28, 2010 · national
JP 2011-035085 · Feb 21, 2011 · national
JP 2011-093543 · Apr 19, 2011 · national
JP 2011-102098 · Apr 28, 2011 · national
JP 2011-140746 · Jun 24, 2011 · national
Continuity (1)
Related Publication 20130121438A1 · May 16, 2013