IP Library Granted Patent US 9,024,267
Granted Patent B2
US 9,024,267 · App. 13/812,303 · Granted May 5, 2015

Radioactive ray detector card

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Quick Facts
Patent No.
US 9,024,267
App. No.
13/812,303
Granted
May 5, 2015
Kind
B2
Abstract

A radioactive ray detector card comprises semiconductor elements on a substrate, each having a plurality of first electrodes, provided on one of main surfaces thereof, and a second electrode, provided on other of main surfaces thereof; the substrate having first electrode wirings electrically connected with the plurality of first electrodes, and card edge portions, which transmit signals from the plurality of semiconductor elements to an external electric circuit; the second electrode corresponding to a second electrode identifier, for identifying the semiconductor elements; the first electrodes corresponding to first electrode identifiers, for identifying the plurality of first electrodes, respectively; and the first electrode wirings electrically connect between the first electrodes, corresponding to one of the first electrode identifiers on one semiconductor element of the plurality of semiconductor elements, and the first electrodes, corresponding to one of the same first electrode identifiers on the other semiconductor element.

Claims (51)

1. A radioactive ray detector card comprising a plurality of semiconductor elements on a substrate having at least a first and a second main surface, comprising:

each semiconductor element has a plurality of first electrodes, which are provided on a first main surface, and a second electrode, which is provided on the second main surface, wherein a plurality of pixel regions are constructed, each being able to detect radioactive rays, between said plurality of first electrodes and said second electrode, respectively;

said substrate has first electrode wiring which is electrically connected with said plurality of first electrodes, and card edge portions, which transmit signals from said plurality of semiconductor elements to an external electric circuit;

said second electrode is corresponded to a second electrode identifier, for identifying said semiconductor elements, respectively;

said plurality of first electrodes are corresponded to first electrode identifiers, for identifying said plurality of first electrodes, respectively; and

said first electrode wiring electrically connecting said first electrodes, which are corresponded to one of said first electrode identifiers on one semiconductor element of said plurality of semiconductor elements, and said first electrodes, which are corresponded to one of said same first electrode identifiers on another semiconductor element;

said substrate having an element mounting portion, on which said plurality of semiconductor elements are mounted, including a plurality of element connector portions to be electrically connected with said plurality of first electrodes, respectively, a second electrode side electronic part mounting portion, for mounting thereon second electrode side electronic parts to be electrically connected with said second electrode, and a first electrode side electronic part mounting portion, being provided separating from said second electrode side electronic part mounting portion, for mounting thereon first electrode side electronic parts to be electrically connected with said first electrodes;

said first electrode wiring electrically connecting said plurality of element connector portions and said first electrode side electronic parts; and

said card edge portions include edge wiring patterns for transmitting the signals from said second electrode side electronic parts and said first electrode side electronic parts to said external electric circuit; said edge wiring patterns include a high-voltage terminal to be applied with high-voltage and a plurality of low-voltage terminals to be applied with voltage lower than that of said high-voltage terminal, and the distance between said high-voltage terminal and said low-voltage terminals is larger than distance between said plurality of low-voltage terminals.

2. The radioactive ray detector card, as described in claim 1 , wherein

said plural of semiconductor elements are provided symmetrically on both surfaces of said substrate, by taking said substrate as a symmetric surface; and

said first electrode wiring, which is provided on the first surface, and said first electrode wiring, which is provided on the second surface, are arranged so that they do not overlap with each other when seeing through said substrate from said first or second surface thereof.

3. The radioactive ray detector card, as described in claim 2 , wherein:

a via hole is provided on said substrate; and

said plurality of first electrodes of the one semiconductor element, which is provided on the first surface, and said plurality of first electrodes of the semiconductor element, which is provided on the second surface, at the position symmetric to said one semiconductor element, are electrically connected with through said via hole.

4. The radioactive ray detector card, as described in claim 3 , wherein:

said external electric circuit identifies said pixel region, upon which said radioactive rays are incident, upon basis of a signal from said second electrode and a signal from one of said plurality of first electrodes.

5. The radioactive ray detector card, as described in claim 2 , wherein:

said external electric circuit identifies said pixel region, upon which said radioactive rays are incident, upon basis of a signal from said second electrode and a signal from one within said plurality of first electrodes.

6. The radioactive ray detector card, as described in the claim 1 , wherein:

a via hole is provided on said substrate; and

said plurality of first electrodes of one semiconductor element, which is provided on the first surface, and said plurality of first electrodes of the semiconductor element, which is provided on the second surface, at the position symmetric to said one semiconductor element, are electrically connected with through said via hole.

7. The radioactive ray detector card, as described in the claim 6 , wherein

said external electric circuit identifies said pixel region, upon which said radioactive rays are incident, upon basis of a signal from said second electrode and a signal from one of said plurality of first electrodes.

8. The radioactive ray detector card, as described in claim 1 , wherein:

said external electric circuit identifies said pixel region, upon which said radioactive rays are incident, upon basis of a signal from said second electrode and a signal from one of said plurality of first electrodes.

9. A radioactive ray detector card comprising a plurality of semiconductor elements on a substrate, wherein:

each of said semiconductor elements has a plurality of first electrodes, which are provided on one of main surfaces thereof, and a second electrode, which is provided on another of main surfaces thereof, wherein a plurality of pixel regions are constructed, each being able to detect radioactive rays, between said plurality of first electrodes and said second electrode, respectively;

said substrate has first electrode wiring to be electronically connected with said plurality of first electrodes, respectively, and card edge portions, which transmit signals from said plurality of semiconductor elements to an external electrical circuit;

said plurality of semiconductor elements are provided symmetrically on both surfaces of said substrate, by taking said substrate as a symmetric surface;

a via hole for electrical connection is provided on said substrate;

said plurality of first electrodes of the one semiconductor element, which is provided on the one surface of said substrate, and said plurality of first electrodes of the semiconductor element, which is provided on the other surface of said substrate, at the position symmetric to said one semiconductor element, are electrically connected through said via hole;

said second electrode is corresponded to a second electrode identifier, for identifying said semiconductor elements, respectively;

said plurality of first electrodes are corresponded to first electrode identifiers, for identifying said plurality of first electrodes, respectively; and

said first electrode wirings electrically connect between said first electrodes, which are corresponded to one of said first electrode identifiers on one semiconductor element of said plurality of semiconductor elements, and said first electrodes, which are corresponded to one of said same first electrode identifiers on the other one semiconductor element.

10. The radioactive ray detector card, as described in claim 9 , wherein:

said substrate has an element mounting portion, on which said plurality of semiconductor elements are mounted, including a plurality of element connector portions to be electrically connected with said plurality of first electrodes, respectively, a second electrode side electronic part mounting portion, for mounting thereon second electrode side electronic parts to be electrically connected with said second electrode, and a first electrode side electronic part mounting portion, being provided separating from said second electrode side electronic part mounting portion, for mounting thereon first electrode side electronic parts to be electrically connected with said first electrodes;

said first electrode wiring electrically connect said plurality of element connector portions and said first electrode side electronic parts; and

said card edge portions include edge wiring patterns for transmitting the signals from said second electrode side electronic parts and said first elect rode side electronic parts to said external electric circuit.

11. The radioactive ray detector card, as described in claim 10 , wherein:

said first electrode wirings, which are provided on the one surface of said substrate, and said first electrode wirings, which are provided on the other surface of said substrate, are arranged so that they do not overlap with each other when seeing through said substrate from a front surface thereof.

12. The radioactive ray detector card, as described in claim 11 , wherein:

said external electric circuit identifies said pixel region, upon which said radioactive rays are incident, upon basis of a signal from said second electrode and a signal from one of said plurality of first electrodes.

13. The radioactive ray detector card, as described in claim 10 , wherein:

said external electric circuit identifies said pixel region, upon which said radioactive rays are incident, upon basis of a signal from said second electrode and a signal from one of said plurality of first electrodes.

14. The radioactive ray detector card, as described in claim 9 , wherein:

said first electrode wirings, which are provided on the one surface of said substrate, and said first electrode wirings, which are provided on the other surface of said substrate, are arranged so that they do not overlap with each other when seeing through said substrate from a front surface thereof.

15. The radioactive ray detector card, as described in claim 14 , wherein:

said external electric circuit identifies said pixel region, upon which said radioactive rays are incident, upon basis of a signal from said second electrode and a signal from one of said plurality of first electrodes.

16. The radioactive ray detector card, as described in claim 9 , wherein:

said external electric circuit identifies said pixel region, upon which said radioactive rays are incident, upon basis of a signal from said second electrode and a signals from one of said plurality of first electrodes.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 6, 2017
From: HITACHI ALOKA MEDICAL, LTD.
To: HITACHI, LTD.
Reel/Frame 041891/0325 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2014
From: HITACHI CONSUMER ELECTRONICS CO., LTD.
To: HITACHI ALOKA MEDICAL, LTD.
Reel/Frame 033315/0057 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR ISAO TAKAHASHI'S EXECUTION DATE TO 05/14/2013 PREVIOUSLY RECORDED ON REEL 030551 FRAME 0795. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF ASSIGNORS INTEREST. Recorded Jul 17, 2013
From: KAWAUCHI, HIDETAKA; SUNAGA, YOSHINORI; TAKAHASHI, ISAO
To: HITACHI CONSUMER ELECTRONICS CO., LTD.
Reel/Frame 030821/0473 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2013
From: KAWAUCHI, HIDETAKA; SUNAGA, YOSHINORI; TAKAHASHI, ISAO
To: HITACHI CONSUMER ELECTRONICS CO., LTD.
Reel/Frame 030551/0795 →