IP Library Granted Patent US 9,374,580
Granted Patent B2
US 9,374,580 · App. 13/816,788 · Granted Jun 21, 2016

System and method for insertion of a program clock reference during packetization of an encoded data stream

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Quick Facts
Patent No.
US 9,374,580
App. No.
13/816,788
Granted
Jun 21, 2016
Kind
B2
Abstract

There is provided a method for clock reference insertion during packetization of an encoded data stream, wherein said packetization is performed before buffering of the data stream. The method comprises storing the value of each bit rate applied during encoding, and the duration of time for which each bit rate is applied. A clock reference time interval is converted into a clock reference data interval using the value of each bit rate applied and the duration of time for which each bit rate is applied. The clock reference data interval is used to determine where to insert a clock reference into the data stream during packetization.

Claims (60)

1. A method for clock reference insertion during packetization of an encoded data stream, the method comprising:

storing, by an encoding apparatus, a value of each bit rate applied during encoding and a duration of time for which each bit rate is applied;

converting, by the encoding apparatus, a clock reference time interval into a clock reference data interval using the value of each bit rate applied and the duration of time for which each bit rate is applied;

during packetization and before a buffering of the data stream by the encoding apparatus, using the clock reference data interval to determine where to insert a clock reference into the data stream during packetization

buffering, by the encoding apparatus, the data stream after the insertion of the clock reference into the data stream; and

upon the sum of the stored durations being greater than or equal to a clock reference time interval:

calculating a clock reference data interval from a sum of the products of the bit rate value applied and its respective duration;

storing the clock reference data interval; and

erasing the stored values of each bit rate applied and the duration of time for which each bit rate is applied.

2. The method of claim 1 , further comprising:

receiving video data; and

encoding the received video data at the applied bit rate to generate the data stream.

3. The method of claim 2 , further comprising:

packetizing the data stream to generate a transport stream; and

buffering the transport stream.

4. The method of claim 1 , wherein the method further comprises, upon the sum of the stored durations being greater than or equal to a clock reference time interval:

the value of any remainder duration for the last applied bit rate in excess of the clock reference time interval is stored together with the value of the bit rate.

5. The method of claim 1 , the method further comprising:

monitoring the volume of data packetized; and

generating a clock reference insertion instruction when the volume of data packetized since the last clock reference insertion is equal to the oldest entry in the stored values of the clock reference data interval.

6. An encoding apparatus wherein packetization of a data stream is performed before buffering of the data stream, the encoding apparatus comprising:

a first memory arranged to store a value of each bit rate applied during encoding by the encoding apparatus and a duration of time for which each bit rate is applied;

a processor operable to:

convert a clock reference time interval into a clock reference data interval using the value of each bit rate applied and the duration of time for which each bit rate is applied;

during packetization and before a buffering of the data stream by the encoding apparatus, use the clock reference data interval to determine where to insert a clock reference into the data stream during packetization;

after the insertion of the clock reference into the data stream, store the data stream in a buffer;

determine when the sum of the stored durations is greater than or equal to a clock reference time interval:

calculate the clock reference data interval from the sum of the products of the bit rate value applied and its respective duration;

store the clock reference data interval in a second memory; and

erase the values stored in the first memory.

7. The encoding apparatus of claim 6 , further comprising:

an input arranged to receive video data; and

an encoder arranged to encode said video data at the applied bit rate.

8. The encoding apparatus of claim 7 , further comprising:

a packetizer arranged to packetize the encoded video data; and

a buffer arranged to buffer the packetized video data.

9. The encoding apparatus of claim 6 , wherein the processor is further arranged to:

store the value of any remainder duration for the last applied bit rate, the remainder in excess of the clock reference time interval, together with the value of the respective bit rate, in the first memory.

10. The encoding apparatus of claim 6 , further comprising a clock reference generator arranged to:

monitor the volume of data packetized; and

generate a clock reference insertion instruction when the volume of data packetized since the last clock reference insertion is equal to the oldest entry in the stored values of the clock reference data interval.

11. A non-transitory computer-readable storage medium storing instructions, which, when executed by computer logic, causes said computer logic to:

storing a value of each bit rate applied during encoding and a duration of time for which each bit rate is applied;

converting a clock reference time interval into a clock reference data interval using the value of each bit rate applied and the duration of time for which each bit rate is applied;

using the clock reference data interval to determine where to insert a clock reference into the data stream during packetization;

calculating a clock reference data interval from a sum of the products of the bit rate value applied and its respective duration;

storing the clock reference data interval;

erasing the stored values of each bit rate applied and the duration of time for which each bit rate is applied.

12. The non-transitory computer-readable storage medium of claim 11 , wherein the instructions are further executable by the computer logic is to cause the computer logic to:

receive video data; and

encode the received video data at the applied bit rate to generate the data stream.

13. The non-transitory computer-readable storage medium of claim 12 , wherein the instructions are further executable by the computer logic is to cause the computer logic to:

packetize the data stream to generate a transport stream; and

buffer the transport stream.

14. The non-transitory computer-readable storage medium of claim 11 , wherein the instructions are further executable by the computer logic is to cause the computer logic to:

determine that the sum of the stored durations is greater than or equal to a clock reference time interval; and

store the value of any remainder duration for the last applied bit rate in excess of the clock reference time interval together with the value of the bit rate.

15. The non-transitory computer-readable storage medium of claim 11 , wherein the instructions are further executable by the computer logic is to cause the computer logic to:

monitor the volume of data packetized; and

generate a clock reference insertion instruction when the volume of data packetized since the last clock reference insertion is equal to the oldest entry in the stored values of the clock reference data interval.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Oct 14, 2025
From: CITIBANK, N.A., AS AGENT
To: MK SYSTEMS USA INC.
Reel/Frame 073070/0114 →
SECURITY INTEREST Recorded Oct 10, 2025
From: MK SYSTEMS USA INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS AGENT
Reel/Frame 073062/0487 →
SECURITY INTEREST Recorded Apr 3, 2020
From: MK SYSTEMS USA INC.
To: CITIBANK, N.A., AS AGENT
Reel/Frame 052312/0567 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 5, 2019
From: MK SYSTEMS US SUB-HOLDCO INC.
To: MK SYSTEMS USA INC.
Reel/Frame 050277/0946 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2019
From: MK SYSTEMS US HOLDCO INC.
To: MK SYSTEMS US SUB-HOLDCO INC.
Reel/Frame 050272/0448 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2019
From: LEONE MEDIA INC.
To: MK SYSTEMS US HOLDCO INC.
Reel/Frame 050265/0490 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 30, 2019
From: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)
To: LEONE MEDIA INC.
Reel/Frame 050220/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2015
From: SPICER, RYAN; MARKS, IAN
To: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)
Reel/Frame 035369/0560 →