Method of manufacturing semiconductor memory device
View Patent ↗A method of manufacturing a semiconductor device according to the present invention includes: forming a lower electrode above a substrate; forming, above the lower electrode, a first variable resistance layer comprising a first metal oxide; forming a step region in the first variable resistance layer by collision of ions excited by plasma; removing residue of the first variable resistance layer created in the forming of the step region; forming a second variable resistance layer which covers the step region of the first variable resistance layer, comprises a second metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first metal oxide, and has a bend on a step formed along an edge of the step region; and forming an upper electrode above the second variable resistance layer.
1. A method of manufacturing a semiconductor memory device, comprising:
forming a lower electrode above a substrate;
forming a first variable resistance layer above the lower electrode, the first variable resistance layer comprising a first metal oxide;
forming a step in a top face of the first variable resistance layer by causing ions excited by plasma to collide with a part of the top face of the first variable resistance layer;
removing residue of the first variable resistance layer remaining on the step, after the step is formed;
forming a second variable resistance layer covering the step of the first variable resistance layer, after the residue is removed, the second variable resistance layer comprising a second metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first metal oxide and having a bend on a surface above the step;
forming an upper electrode above the second variable resistance layer;
forming a third variable resistance layer above the first variable resistance layer before the step is formed, the third variable resistance layer comprising a third metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first metal oxide, and
wherein, in the forming of a step, the step is formed by forming an opening penetrating through the third variable resistance layer by causing the ions to collide with a part of a top face of the third variable resistance layer, and causing the ions to collide with the first variable resistance layer exposed at a bottom of the opening, the part being located above the part of the top face of the first variable resistance layer.
2. The method of manufacturing a semiconductor memory device according to claim 1 ,
wherein, in the forming of a step, the part of the top face of the first variable resistance layer is removed through collision with the ions, and the step is formed at a border between the removed part of the top face of the first variable resistance layer and a remaining part of the top face that is not removed.
3. The method of manufacturing a semiconductor memory device according to claim 1 ,
wherein, in the forming of a step, the collision with the ions is performed in an inert gas or a mixed gas which has an inert gas as a primary component and does not contain fluorine.
4. The method of manufacturing a semiconductor memory device according to claim 1 ,
wherein, in the removing of residue, the residue is etched using a solution including any of ammonia, fluorine, and chlorine.
5. The method of manufacturing a semiconductor memory device according to claim 1 , further comprising
terminating dangling bonds of the first metal oxide with oxygen, after the residue is removed.
6. The method of manufacturing a semiconductor memory device according to claim 5 ,
wherein in the terminating of dangling bonds with oxygen, the dangling bonds of the first metal oxide are terminated using a solution including either hydrogen peroxide or ozone.
7. The method of manufacturing a semiconductor memory device according to claim 1 ,
wherein the residue remains as flakes on the step, after the step is formed.