IP Library Granted Patent US 9,198,255
Granted Patent B2
US 9,198,255 · App. 13/827,578 · Granted Nov 24, 2015

Voltage to current architecture to improve PWM performance of output drivers

Inventors: Abu Kamal (Santa Clara, CA); James Caravella (Chandler, AZ)
Assignee: NXP B.V.
H05B33/0887H05B33/0818H05B33/0884Y02B20/347
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Quick Facts
Patent No.
US 9,198,255
App. No.
13/827,578
Granted
Nov 24, 2015
Kind
B2
Abstract

Various aspects of the present disclosure include a controlled current path having a load that draws current from the controlled current path. In response to a modulating voltage signal, current is controlled through the load which causes a transistor circuit, including a transistor, to switch between two current modes. Switching will subject the transistor to voltage stresses due to current in the controlled current path spiking towards a breakdown threshold of the transistor. In response to a first aspect of the modulating voltage signal and in one of the current modes, the current in the controlled current path is directed through the first current branch. In response to a second aspect of the modulating voltage signal and in the other current mode, the current in the controlled current path is diverted from the first current branch to a second current branch.

Claims (37)

1. A method comprising:

providing a controlled current path including a load configured and arranged to draw current from the controlled current path;

controlling current through the load in the controlled current path, in response to first and second aspects of a modulating voltage signal, by causing a transistor circuit, including a transistor, to switch between

a current-conducting mode in which the controlled current is drawn through a first current branch,

a current-blocking mode in which the controlled current through the first current branch is blocked; and

wherein switching the transistor between the current-conducting mode and the current-blocking mode subjects junctions of the transistor to voltage stresses due to current in the controlled current path spiking towards a breakdown threshold of the transistor;

in response to the first aspect of the modulating voltage signal and in the current-conducting mode, using the transistor circuit to direct current in the controlled current path through the first current branch; and

in response to the second aspect of the modulating voltage signal and in the current-blocking mode, diverting the current in the controlled current path from the first current branch to a second current branch sufficiently fast to suppress current spikes in the controlled current path and the junctions from reaching the breakdown threshold of the transistor and thereby avoiding junction breakdown.

2. The method of claim 1 , wherein the transistor is voltage biased, a node connected to the load, at a voltage level that is greater than a breakdown voltage defined, between the node and a control input, for the transistor and switching the transistor between the current-conducting mode and the current-blocking mode causes spikes in a transient current through the load.

3. The method of claim 1 , wherein the modulating voltage signal is a pulse-width modulation signal, and the second current path provides a light bias in the current-conducting mode and is activated to provide a greater bias in the current-blocking mode, thereby permitting for immediate affect when switching between the current-conducting mode and the current-blocking mode.

4. The method of claim 1 , wherein the transistor is a MOS-type transistor and wherein the transistor includes a drain that is voltage biased by a node connected to the load, at a voltage level that is greater than a gate-drain breakdown voltage level defined for the transistor.

5. The method of claim 1 , wherein the load includes a plurality of light emitting diodes (LEDs) susceptible to change in light intensity in response to the current spikes.

6. The method of claim 1 , wherein the load includes a plurality of receive electrodes configured and arranged to receive signals in a sense matrix.

7. An apparatus comprising:

a controlled current path including a load configured and arranged to draw current from the controlled current path;

a first current branch and a second current branch;

a transistor circuit, including a transistor, configured and arranged to switch between a current-conducting mode and a current-blocking mode; and

a control circuit configured and arranged to

control current through the load in the controlled current path in response to first and second aspects of a modulating voltage signal, by causing the transistor to switch between the current-conducting mode in which the controlled current is drawn through the first current branch, and the current-blocking mode in which the controlled current through the first current branch is blocked, wherein switching the transistor between the current-conducting mode and the current-blocking mode subjects junctions of the transistor to voltage stresses due to current in the controlled current path spiking towards a breakdown threshold of the transistor,

in response to the first aspect of the modulating voltage signal and in the current-conducting mode, use the transistor circuit to direct current in the controlled current path through the first current branch, and

in response to the second aspect of the modulating voltage signal and in the current-blocking mode, divert the current in the controlled current path from the first current branch to the second current branch sufficiently fast to suppress current spikes in the controlled current path and the junctions from reaching the breakdown threshold of the transistor and thereby avoiding junction breakdown.

8. The apparatus of claim 7 , wherein the transistor is voltage biased, a node connected to the load, at a voltage level that is greater than a breakdown voltage defined, between the node and a control input, for the transistor and switching the transistor between the current-conducting mode and the current-blocking mode causes spikes in a transient current through the load.

9. The apparatus of claim 7 , wherein the modulating voltage signal is a pulse-width modulation signal.

10. The apparatus of claim 7 , wherein the transistor is a MOS-type transistor and wherein the transistor includes a drain that is voltage biased by a node connected to the load, at a voltage level that is greater than a gate-drain breakdown voltage level defined for the transistor.

11. The apparatus of claim 7 , wherein the load includes a plurality of LEDs susceptible to change in light intensity in response to the current spikes.

12. The apparatus of claim 7 , wherein the load includes a plurality of receive electrodes configured and arranged to receive signals in a sense matrix.

13. A method comprising:

providing a controlled current path including a light emitting diode (LED) string configured and arranged to draw current from the controlled current path and turn on and off in response thereto;

controlling current through the LED string in the controlled current path, in response to first and second aspects of a pulse-width modulation signal, by causing a transistor circuit, including a transistor, to switch between

a current-conducting mode in which the controlled current is drawn through a first current branch,

a current-blocking mode in which the controlled current through the first current branch is blocked; and

wherein switching the transistor between the current-conducting mode and the current-blocking mode subjects junctions of the transistor to voltage stresses due to current in the controlled current path spiking, causing the LED string to malfunction, towards a breakdown threshold of the transistor;

in response to the first aspect of the pulse-width modulation signal and in the current-conducting mode, using the transistor circuit to direct current in the controlled current path through the first current branch; and

in response to the second aspect of the pulse-width modulation signal and in the current-blocking mode, diverting the current in the controlled current path from the first current branch to a second current branch sufficiently fast to suppress current spikes in the controlled current path and the junctions from reaching the breakdown threshold of the transistor and thereby avoiding junction breakdown.

14. The method of claim 13 , wherein the transistor is voltage biased, by a node connected to a load, at a voltage level that is greater than a breakdown voltage defined, between the node and a control input, for the transistor.

15. The method of claim 13 , wherein the transistor is an extended drain MOS-type transistor and wherein the transistor includes a drain that is voltage biased by a node connected to the load, at a voltage level that is greater than a gate-drain breakdown voltage level defined for the transistor.

16. The method of claim 15 , wherein the LED string includes a plurality of receive electrodes configured and arranged to receive signals in a sense matrix.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2013
From: KAMAL, ABU; CARAVELLA, JAMES
To: NXP B.V.
Reel/Frame 030795/0351 →
Continuity (1)
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