IP Library Granted Patent US 9,203,759
Granted Patent B2
US 9,203,759 · App. 13/827,780 · Granted Dec 1, 2015

Switch state reporting

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Quick Facts
Patent No.
US 9,203,759
App. No.
13/827,780
Granted
Dec 1, 2015
Kind
B2
Abstract

Disclosed are various embodiments that relate to a network switch. The network switch obtains a network state metric, the network state metric quantifying a network traffic congestion associated with a switch. The network switch identifies a synchronous time stamp associated with the network state metric and generates an network state reporting message, the network state reporting message comprising the network state metric and the synchronous time stamp. The network state reporting message may be transmitted to a monitoring system.

Claims (41)

1. A system comprising:

processing circuitry implemented in a switch, the processing circuitry being configured to:

determine a network state metric, the network state metric quantifying a network traffic congestion associated with the switch based on a state of data packets being processed at the switch at a specific time;

obtain reference clock data, the reference clock data being associated with a set of switches;

determine a synchronous time stamp associated with the specific time of determining the network state metric at the switch, the synchronous time stamp being determined based at least upon the reference clock data;

generate a network state packet, the network state packet comprising the synchronous time stamp and the network state metric; and

transmit the network state packet to a monitoring system.

2. The system of claim 1 , wherein the switch comprises a dedicated output port, wherein the processing circuitry is configured to transmit the network state packet via the dedicated output port.

3. The system of claim 1 , wherein the switch comprises an output data port configured to route outbound data packets, wherein the processing circuitry is configured to transmit the network state packet via the output data port.

4. The system of claim 1 , wherein the processing circuitry is further configured to determine a packet delay for a data packet that is routed via the switch, wherein the network state metric is determined based at least upon the packet delay.

5. The system of claim 4 , wherein the packet delay is determined based at least upon a switch time stamp that is local with respect to the switch.

6. The system of claim 1 , wherein the processing circuitry is further configured to determine an average delay for a set of data packets routed via the switch, the set of data packets being associated with a packet class, wherein the network state metric comprises the average delay.

7. The system of claim 1 , wherein the processing circuitry is further configured to:

associate a set of data packets to an application based at least upon a corresponding packet identifier associated with each of the data packets; and

determine an average application delay for the set of data packets routed via the switch, wherein the network state metric comprises the average application delay.

8. A network switch comprising:

a plurality of input ports configured to receive data packets;

a plurality of output ports configured to transmit the data packets; and

processing circuitry configured to:

determine a network state metric, the network state metric being associated with a routing of the data packets from the plurality of input ports to the plurality of output ports, the network state metric indicating a state of the data packets being processed at the switch at a specific time;

determine a synchronous time stamp associated with the specific time of determining the network state metric at the switch, the synchronous time stamp being based on a reference clock, the reference clock being associated with a plurality of switches;

generate a network state packet, the network state packet comprising the synchronous time stamp and the network state metric; and

transmit the network state packet to a predetermined monitoring system.

9. The network switch of claim 8 , wherein the network switch further comprises a packet buffer configured to store at least a portion of the data packets, wherein the network state metric indicates a memory capacity of the packet buffer.

10. The network switch of claim 9 , wherein the packet buffer is partitioned into a set of packet buffer partitions, wherein the network state metric is based at least upon a memory capacity of a packet buffer partition.

11. The network switch of claim 8 , wherein the network switch further comprises a packet buffer configured to store at least a portion of the data packets, the packet buffer being associated with a headroom level, the headroom level being configured to limit quantity of packets written to the packet buffer, wherein the network state metric comprises the headroom level.

12. The network switch of claim 8 , wherein the network switch further comprises a packet queue, the packet queue being configured to store packet buffer addresses associated with at least a portion of the data packets, wherein the network state metric is based at least in part upon a quantity of packets accumulated in the packet queue or an amount of memory accumulated in the packet queue.

13. The network switch of claim 8 , wherein the network state metric is based at least in part upon a power consumption of at least a portion of the network switch.

14. The network switch of claim 8 , wherein the processing circuitry is further configured to transmit the network state packet to the monitoring system in response to comparing the network state metric to a predetermined threshold value.

15. A method comprising:

obtaining a network state metric, the network state metric quantifying a network traffic congestion associated with a switch based on a state of data packets being processed at the switch at a specific time;

identifying a synchronous time stamp associated with the specific time of determining the network state metric at the switch;

generating an network state reporting message, the network state reporting message comprising the network state metric and the synchronous time stamp; and

transmitting the network state reporting message to a monitoring system.

16. The method of claim 15 , wherein the switch is one of a plurality of switches, the plurality of switches being synchronized according to a reference clock, wherein the synchronous time stamp is based at least upon the reference clock.

17. The method of claim 15 , wherein the switch is configured to relay data packets, wherein the network state reporting message is encoded as a network state packet.

18. The method of claim 17 , further comprising designating a predetermined packet priority to the network state packet for facilitating transmission to the monitoring system.

19. The method of claim 15 , further comprising:

obtaining an updated network state metric; and

transmitting an updated network state reporting message according to a predetermined transmission interval, the updated network state reporting message comprising the updated network state metric.

20. The method of claim 15 , wherein transmitting comprises transmitting in response to comparing the network state metric to a predetermined threshold value.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2013
From: MATTHEWS, WILLIAM BRAD; KWAN, BRUCE HUI; AGARWAL, PUNEET
To: BROADCOM CORPORATION
Reel/Frame 030504/0653 →