Hardware integrity verification
View Patent ↗A flash memory management method and apparatus provides for the separation of the command and data paths so that communication paths may be used more efficiently, taking account of the characteristics of NAND FLASH circuits where the times to read, write and erase data differ substantially. A unique sequence identifier is assigned to a write command and associated data and association of the data and commands are validated prior to writing to the memory by comparing the unique sequence numbers of the data and command prior to executing the command. This comparison is performed after the data and command have traversed the communication paths.
1. A system for storing digital data, comprising:
a controller that is configured to:
send commands including write commands and
write data chunks associated with the write commands,
wherein the write commands are tagged with sequence numbers and physical “PHY” channels to which the write commands are directed, and the write data chunks are tagged with a same sequence number as its corresponding write command; and
a flash interface configured to:
receive the write commands from the controller via a command path,
transfer the write commands to the tagged PHY channels,
receive, at a time different from when the write commands are received, the write data chunks from the controller via a data path between the controller and the flash interface which is different from the command path, and,
match by tagged sequence number, the write commands with the write data chunks associated with the write commands,
when the sequence numbers tagged to the write commands and write data chunks are matched, transfer the write data chunks to the tagged PHY channels via a data path between the flash interface and the PHY channels, and
when the sequence numbers tagged to the commands and data chunks are mismatched, the flash interface is further configured to abort the transfer of the write commands and the write data.
2. A method for storing digital data, comprising:
sending, from a controller to a flash interface, commands including write commands and write data chunks associated with the write commands, wherein the write commands are tagged with sequence numbers and physical “PHY” channels to which the write commands are directed, and the write data chunks are tagged with a same sequence number as its corresponding write command,
receiving, by the flash interface, the write commands from the controller via a command path,
transferring the write commands to the tagged PHY channels,
receiving, at a time different from when the write commands are received, by the flash interface, the write data chunks from the controller via a data path between the controller and the flash interface which is different from the command path;
matching, by tagged sequence number at the flash interface, the write commands with the write data chunks associated with the write commands,
when the sequence numbers tagged to the write commands and write data chunks are matched, transferring the write data chunks to the tagged PHY channels via a data path between the flash interface and the PHY channels, wherein the command path and the data path are different physical paths, and
when the sequence numbers tagged to the write commands and the write data chunks are mismatched, aborting the transfer of the write commands and the write data by the flash interface.
3. A computer program product for storing digital data, the computer program product being embodied in a non-transitory computer readable storage medium and comprising computer instructions for:
sending, from a controller to a flash interface, commands including write commands and write data chunks associated with the write commands, wherein the write commands are tagged with sequence numbers and physical “PHY” channels to which the write commands are directed, and the write data chunks are tagged with a same sequence number as the corresponding command;
receiving, at the flash interface, the write commands from the controller via a command path;
transferring the commands to the tagged PHY channels,
receive, at a time different from when the write commands are received, the write data chunks from the controller via a data path between the controller and the flash interface which is different from the command path,
matching, by tagged sequence numbers at the flash interface, the write commands with the write data chunks associated with the write commands,
when the sequence numbers tagged to the write commands and the write data chunks are matched, transferring the write data chunks to the tagged PHY channels via a data path between the flash interface and the PHY channels, wherein the command path and the data path are different physical paths, and
when the sequence numbers tagged to the write commands and the write data chunks are mismatched, aborting the transfer of the write commands and the write data by the flash interface.
4. A system for storing digital data, comprising:
a controller that is configured to:
send commands including read commands and receive read data chunks associated with the read commands,
wherein the read commands are tagged with sequence numbers and physical “PHY” channels to which the read commands are directed; and
a flash interface configured to:
receive the read commands from the controller via a command path,
transfer the read commands to the PHY channels to which the read commands are directed,
receive the read data chunks associated with the read commands from the PHY channels at a time different from when the read command was received, and tag the received read data chunks with a same sequence number as its corresponding read command,
transfer the tagged read data chunks to the controller via a data path between the controller and the flash interface which is different from the command path,
wherein the controller is further configured to match by tagged sequence number, the read commands with the read data chunks associated with the read commands,
when the sequence numbers tagged to the read commands and read data chunks are mismatched, to abort the transfer of the read data chunks.