Liquid crystal display
View Patent ↗A liquid crystal display has its common electrode and pixel electrodes formed on a same substrate where the substrate further includes a plurality of common voltage transmitting lines disposed under both of the common electrode and the pixel electrodes and forming a ladder-like network connected to the common electrode at multiple connection locations for providing the common voltage to the common electrode by way of conduction paths having substantially lower resistivity than the common electrode, whereby an RC delay factor of transmitting the common voltage is reduced.
1. A liquid crystal display comprising:
a substrate;
a plurality of pixel electrodes disposed on the substrate and organized as a matrix having rows of pixel electrodes and columns of pixel electrodes;
a common electrode also disposed on the substrate to be in a spaced apart and electric field forming relation with the pixel electrodes;
a plurality of paired gate lines disposed on the substrate and extending substantially in a direction of the rows of pixel electrodes (pixel electrode rows) with each pair of gate lines respectively having an upper gate line extending adjacent to a top portion of a respective row of pixel electrodes (pixel electrodes row) and a lower gate line extending adjacent to a bottom portion of the respective pixel electrodes row;
a plurality of data lines disposed on the substrate and extending substantially in a direction of the columns of pixel electrodes (pixel electrode columns), the plurality of data lines including a first data line disposed at a left side of a corresponding pair of neighboring first and second pixel electrode columns, wherein no data line is disposed between the corresponding pair of neighboring first and second pixel electrode columns; among the plurality of pixel electrodes and including a second data line disposed at a right side of the corresponding pair of neighboring first and second pixel electrode columns;
a plurality of paired first common voltage transmitting line portions disposed on the substrate and extending substantially in the direction of the rows with each pair of first common voltage transmitting line portions respectively having an upper first common voltage transmitting line portion extending adjacent to the top portion of the respective row of pixel electrodes (pixel electrodes row) and a lower first common voltage transmitting line portion extending adjacent to the bottom portion of the respective pixel electrodes row;
a plurality of second common voltage transmitting line portions disposed on the substrate and extending substantially in the direction of the columns, with each second common voltage transmitting line portion being disposed between the corresponding pair of neighboring first and second pixel electrode columns among the plurality of pixel electrodes and providing a column direction connection between an adjacent pair of the upper and lower first common voltage transmitting line portions,
wherein one of the pixel electrodes and the common electrode has a patterned cutouts shape and the other does not have a patterned cutouts shape.
2. The liquid crystal display of claim 1 , further comprising
an insulating layer disposed between the first and second common voltage transmitting line portions and the common electrode, the insulating layer having one or more common voltage conveying holes communicating therethrough, and
wherein the common electrode is physically and electrically connected to at least one of the first and second common voltage transmitting line portions through the one or more common voltage conveying holes formed through the insulating layer.
3. The liquid crystal display of claim 2 , wherein
the one or more common voltage conveying holes communicate to respective contact portions of respective ones of the second common voltage transmitting line portions.
4. The liquid crystal display of claim 2 , wherein
an upper one of the second common voltage transmitting line portions that is disposed in a corresponding upper one of the pixel electrodes rows is connected to a lower one of the second common voltage transmitting line portions that is disposed in a correspondingly neighboring and lower pixel electrodes row by way of at least one of the common voltage conveying holes formed through the insulating layer.
5. The liquid crystal display of claim 4 , wherein
the connection of the second common voltage transmitting line portions is formed one by one per two pixel electrode columns among a plurality of pixel electrodes.
6. The liquid crystal display of claim 4 , further comprising
a light blocking member having light blocking portions respectively overlapping the gate lines, the data lines, and the common voltage conveying holes.
7. The liquid crystal display of claim 6 , wherein
a plurality of pixel electrodes that are not overlapped by the light blocking member are each split into domain areas that have the same upper and lower lengths with respect to a center transverse reference line.
8. The liquid crystal display of claim 7 , wherein
the plurality of data lines include a plurality of source electrodes branching integrally therefrom,
wherein the substrate further includes a plurality of drain electrodes in a same layer with and facing the plurality of source electrodes, and
each of the plurality of pixel electrodes is disposed directly on a portion of a respective one of the plurality of drain electrodes.
9. The liquid crystal display of claim 8 , wherein
one of two immediately adjacent pixel electrodes in a row is connected to the first data line and the other of the two immediately adjacent pixel electrodes is connected to the second data line and there is no data line extending between the two immediately adjacent pixel electrodes.
10. The liquid crystal display of claim 8 , wherein
pairs of two pixel electrodes each are respectively connected as pairs to the first data line and to the second data line respectively.
11. The liquid crystal display of claim 1 , further comprising
an insulating layer disposed between the second common voltage transmitting lines and the common electrode,
wherein the common electrode is physically and electrically connected to at least one of the second common voltage transmitting lines through a common voltage conveying hole formed through the insulating layer.
12. The liquid crystal display of claim 11 , wherein
the common voltage conveying hole exposes a portion of the at least one of the second common voltage transmitting line.
13. The liquid crystal display of claim 11 , wherein
the at least one of the second common voltage transmitting lines is disposed in a respective first pixel electrode row immediately neighboring a second pixel electrode row and is connected to a second of the second common voltage transmitting lines disposed in the second pixel electrode row by way of the common voltage conveying hole formed through the insulating layer.
14. The liquid crystal display of claim 13 , wherein
the connection between the first and second of the second common voltage transmitting lines is formed on a per row basis only once every two pixel electrode columns along that row.
15. The liquid crystal display of claim 13 , further comprising
a light blocking member overlapping a plurality of gate lines, a plurality of data lines, and the contact hole.
16. The liquid crystal display of claim 15 , wherein
a plurality of pixel electrodes that are not overlapped by the light blocking member each have plural domain areas with respective same upper and lower lengths with respect to a center transverse reference line.
17. The liquid crystal display of claim 16 , wherein
the plurality of data lines each include a plurality of source electrodes integrally branching therefrom,
the substrate further has disposed thereon, a plurality of drain electrodes facing the plurality of source electrodes, and
the plurality of pixel electrodes are respectively each disposed directly on a portion of a respective one of the plurality of drain electrodes.
18. The liquid crystal display of claim 17 , wherein
one of two immediately adjacent pixel electrodes in a row is connected to the first data line and the other of the two immediately adjacent pixel electrodes is connected to the second of the data line and there is no data line extending between the two immediately adjacent pixel electrodes.
19. The liquid crystal display of claim 17 , wherein
pairs of two pixel electrodes each are respectively connected as pairs to the first data line and to the second data line respectively.
20. The liquid crystal display of claim 1 , wherein
the plurality of data lines each include a plurality of source electrodes integrally branching therefrom,
the substrate further has disposed thereon, a plurality of drain electrodes facing the plurality of source electrodes, and
the plurality of pixel electrodes are respectively each disposed directly on a portion of a respective one of the plurality of drain electrodes.
21. The liquid crystal display of claim 20 , wherein
one of two immediately adjacent pixel electrodes in a row is connected to the first data line and the other of the two immediately adjacent pixel electrodes is connected to the second data line and there is no data line extending between the two immediately adjacent pixel electrodes.
22. The liquid crystal display of claim 20 , wherein
pairs of two pixel electrodes each are respectively connected as pairs to the first data line and to the second data line respectively.
23. The liquid crystal display of claim 1 , wherein
one of two immediately adjacent pixel electrodes in a row is connected to the first data line and the other of the two immediately adjacent pixel electrodes is connected to the second data line and there is no data line extending between the two immediately adjacent pixel electrodes.
24. The liquid crystal display of claim 1 , wherein
pairs of two pixel electrodes each are respectively connected as pairs to the first data line and to the second data line respectively.