IP Library Granted Patent US 8,970,258
Granted Patent B2
US 8,970,258 · App. 13/830,047 · Granted Mar 3, 2015

Systems and methods for edge control in a switched output stage

Inventors: Dan Shen (Austin, TX); Johann Gaboriau (Austin, TX); Lingli Zhang (Austin, TX); Christian Larsen (Austin, TX)
Assignee: Cirrus Logic, Inc.
H02M1/08
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Quick Facts
Patent No.
US 8,970,258
App. No.
13/830,047
Granted
Mar 3, 2015
Kind
B2
Abstract

In accordance with embodiments of the present disclosure, systems and methods may include a switch coupled at its gate terminal to an input signal voltage, the input signal voltage for controlling a gate voltage of a gate terminal of a driver device coupled at its non-gate terminals between a rail voltage and an output node. The systems and methods may also include a diode having a first terminal and a second terminal, the diode coupled to a non-gate terminal of the switch such that when the switch is enabled, the first terminal is electrically coupled to the gate terminal of the driver device and the second terminal is electrically coupled to the output node.

Claims (20)

1. An apparatus comprising:

a switch configured to receive at its gate terminal an input indicative of an input signal voltage, the input signal voltage for controlling a gate voltage of a gate terminal of a driver device coupled at its non-gate terminals between a rail voltage and an output node; and

a diode having a first terminal and a second terminal, the diode coupled to a non-gate terminal of the switch such that when the switch is enabled, the first terminal is electrically coupled to the gate terminal of the driver device and the second terminal is electrically coupled to the output node.

2. The apparatus of claim 1 , wherein the diode is coupled at the second terminal to the non-gate terminal of the switch and coupled at the first terminal to the gate terminal of the driver device.

3. The apparatus of claim 1 , wherein the diode is coupled at the first terminal to the non-gate terminal of the switch and coupled at the second terminal to the output node.

4. The apparatus of claim 1 , wherein the diode is implemented as a transistor having its gate terminal coupled to one of its non-gate terminals.

5. The apparatus of claim 4 , wherein the diode is implemented as a p-type metal-oxide-semiconductor field effect transistor, such that the first terminal comprises a cathode terminal of the diode and the second terminal comprises an anode terminal of the diode.

6. The apparatus of claim 5 , wherein the diode is implemented as an n-type metal-oxide-semiconductor field effect transistor, such that the first terminal comprises an anode terminal of the diode and the second terminal comprises a cathode terminal of the diode.

7. The apparatus of claim 1 , wherein the driver device comprises at least a portion of an output stage of a power converter.

8. The apparatus of claim 7 , wherein the driver device comprises at least a portion of an output stage of a Class-D amplifier.

9. A method comprising:

selectively enabling a switch coupled at its gate terminal to an input indicative of an input signal voltage, the input signal voltage for controlling a gate voltage of a gate terminal of a driver device coupled at its non-gate terminals between a rail voltage and an output node; and

responsive to the enabling of the switch, electrically coupling a first terminal of a diode to the gate terminal of the driver device and electrically coupling a second terminal of the diode to the output node, wherein the diode is coupled to a non-gate terminal of the diode.

10. The method of claim 9 , wherein the diode is coupled at the second terminal to the non-gate terminal of the switch and coupled at the first terminal to the gate terminal of the driver device.

11. The method of claim 9 , wherein the diode is coupled at the first terminal to the non-gate terminal of the switch and coupled at the second terminal to the output node.

12. The method of claim 9 , wherein the diode is implemented as a transistor having its gate terminal coupled to one of its non-gate terminals.

13. The method of claim 12 , wherein the diode is implemented as a p-type metal-oxide-semiconductor field effect transistor, such that the first terminal comprises a cathode terminal of the diode and the second terminal comprises an anode terminal of the diode.

14. The method of claim 12 , wherein the diode is implemented as an n-type metal-oxide-semiconductor field effect transistor, such that the first terminal comprises an anode terminal of the diode and the second terminal comprises a cathode terminal of the diode.

15. The method of claim 9 , wherein the driver device comprises at least a portion of an output stage of a power converter.

16. The method of claim 15 , wherein the driver device comprises at least a portion of an output stage of a Class-D amplifier.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2013
From: SHEN, DAN; GABORIAU, JOHANN; ZHANG, LINGLI; LARSEN, CHRISTIAN
To: CIRRUS LOGIC, INC.
Reel/Frame 030599/0652 →
Continuity (1)
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