IP Library Granted Patent US 9,088,257
Granted Patent B2
US 9,088,257 · App. 13/834,953 · Granted Jul 21, 2015

Device and method for controlling power amplifier

Inventors: Michael Wendell Vice (El Granada, CA); Sungkil Hwang (Santa Clara, CA)
Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
H03G1/0017H03G3/20
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Quick Facts
Patent No.
US 9,088,257
App. No.
13/834,953
Granted
Jul 21, 2015
Kind
B2
Abstract

A device for controlling operation of a power amplifier includes a detector, a reference signal generator and a controller. The detector is configured to detect a voltage level of an output signal of the power amplifier with respect to a predetermined boost threshold and to generate a corresponding detection signal and a reference signal. The controller is configured to provide a supply voltage to an output transistor of the power amplifier based on a comparison of the detection signal and the reference signal, the supply voltage being a no boost voltage, which is substantially the same as a supply voltage, when the comparison indicates that the voltage level is within the predetermined boost threshold, and the supply voltage being one of multiple boost voltages when the detection signal indicates that the voltage level is beyond the predetermined boost threshold. The controller generates the boost voltages by boosting the supply voltage.

Claims (39)

1. A device for controlling operation of a power amplifier configured to amplify an input signal, the device comprising:

a detector configured to detect a negative peak voltage level of an output signal of the power amplifier with respect to a predetermined boost threshold and to generate a corresponding detection signal and a reference signal; and

a controller configured to provide a supply voltage to an output transistor of the power amplifier based on a comparison of the detection signal and the reference signal, the supply voltage being a no boost voltage, which is substantially the same as a power supply voltage, when the comparison indicates that the negative peak voltage level is within the predetermined boost threshold, and the supply voltage being one of a plurality of predetermined boost voltages when the detection signal indicates that the negative peak voltage level is beyond the predetermined boost threshold,

wherein the controller generates the plurality of predetermined boost voltages by boosting the power supply voltage.

2. The device of claim 1 , wherein the controller is further configured to decrease the supply voltage from the one of the plurality of predetermined boost voltages to the no boost voltage or to a boost voltage having a lower value than the one of the plurality of predetermined boost voltages when the comparison indicates that the negative peak voltage level has increased to a predetermined recovery threshold.

3. The device of claim 1 , wherein the predetermined boost threshold corresponds to saturation of the output transistor.

4. The device of claim 3 , wherein the detector detects the negative peak voltage level by evaluating a magnitude of an envelope of the input signal.

5. The device of claim 1 , wherein the plurality of predetermined boost voltages comprise a medium boost voltage one boost voltage step above the no boost voltage and a high voltage one boost voltage step above the medium boost voltage.

6. The device of claim 5 , wherein the medium boost voltage is about 1.5 times the no boost voltage and the high voltage is about twice the no boost voltage.

7. The device of claim 1 , wherein controller comprises:

a detector encoder configured to perform the comparison of the detection signal and the reference signal and to output a Boost Request signal and a Recovery Request signal in response to the comparison;

a switch sequencer configured to translate the Boost Request signal and the Recovery Request signal into a plurality of control bits; and

a power switch comprising a plurality of transistors controlled by the plurality of control bits and a plurality of charge storage capacitors selectively connectable to an output of the controller by operation of the plurality of transistors for outputting the supply voltage from the controller.

8. The device of claim 7 , wherein the plurality of control bits prevent each of the plurality of charge storage capacitors from being shorted by the power switch.

9. The device of claim 7 , wherein the detector encoder comprises:

a first comparator configured to compare the detection signal and the reference signal to output the Boost Request signal; and

a second comparator configured to compare a scaled detection signal and a scaled reference signal to output the Recovery Request signal,

wherein the scaled detection signal is based on dividing the detection signal, and the scaled reference signal is based on dividing the reference signal to provide a scaled reference signal and adding an offset voltage to the scaled reference signal.

10. The device of claim 7 , wherein the controller further comprises:

a charge pump power supply configured to provide a charge pump voltage to the power switch to charge at least one of the first and second charge storage capacitors to a voltage approximately equal to the supply voltage.

11. The device of claim 7 , further comprising:

a compensation circuit connected as shunt-shunt feedback around the output transistor of the power amplifier.

12. The device of claim 11 , wherein the compensation circuit comprises a plurality of series RC circuits connected in series with a corresponding plurality of switches for selectively switching in the plurality of series RC circuits, respectively, the number of series RC circuits being less than or equal to the number of predetermined boost voltages.

13. A method of selectively boosting a collector supply voltage of an output transistor in a power amplifier amplifying a radio frequency (RF) signal, the method comprising:

providing a supply voltage as the collector supply voltage of the output transistor by connecting a supply voltage source to the output transistor, and selectively connecting a plurality of charge storage capacitors to receive charge from the supply voltage source to charge each of the plurality of charge storage capacitors to a capacitor voltage value;

evaluating a magnitude of an envelope of the RF signal and detecting when a lowest occurring voltage extreme of the envelope becomes less than a predetermined boost threshold;

providing a first boosted voltage as the collector supply voltage when the lowest occurring voltage extreme of the envelope becomes less than the predetermined boost threshold by connecting one of the plurality of charge storage capacitors between the supply voltage source and the output transistor, the first boosted voltage comprising the supply voltage plus the capacitor voltage value previously stored in one of the plurality of charge storage capacitors; and

providing a second boosted voltage as the collector supply voltage when the lowest occurring voltage extreme of the envelope becomes less than the predetermined boost threshold, while the first boosted voltage is being provided as the collector supply voltage, by simultaneously connecting two of the plurality of charge storage capacitors between the supply voltage source and the output transistor, the second boosted voltage comprising the supply voltage plus the capacitor voltage values previously stored in both of the two charge storage capacitors.

14. The method of claim 13 , further comprising:

detecting when the lowest occurring voltage extreme of the envelope becomes greater than a predetermined recovery threshold, while the second boosted voltage is being provided as the collector supply voltage; and

providing the first boosted voltage as the collector supply voltage.

15. The method of claim 14 , further comprising:

detecting when the lowest occurring voltage extreme of the envelope again becomes greater than the predetermined recovery threshold, while the first boosted voltage is being provided as the collector supply voltage; and

providing the supply voltage as the collector supply voltage.

16. A device for controlling operation of a power amplifier configured to amplify a radio frequency (RF) signal, the device comprising:

a detector configured to generate a detection signal and a reference signal based on a negative peak voltage level of an output signal of the power amplifier;

a DC controller configured to provide a DC supply voltage and a plurality of compensation signals to an output transistor of the power amplifier based on comparison of the detection signal and the reference signal, the DC supply voltage being a no boost voltage when the negative peak voltage level is above a predetermined boost threshold, and one of a medium boost voltage and a high boost voltage when the negative peak voltage level is below the predetermined boost threshold; and

a compensation circuit comprising a plurality of series RC circuits connected in series with a corresponding plurality of switches for selectively connecting one or more of the plurality of series RC circuits, respectively, around the transistor in a shunt-shunt feedback configuration in response to the plurality of compensation signals.

17. The device of claim 16 , wherein each switch of the plurality of switches comprises at least one bipolar junction transistor (BJT).

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 6, 2013
From: VICE, MICHAEL WENDELL; HWANG, SUNGKIL
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 030560/0644 →
Continuity (1)
Related Publication 20140266456A1 · Sep 18, 2014